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Commit 7626856b authored by Kyle Piefer's avatar Kyle Piefer
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ARM: dts: msm: Use SMR mask for KGSL SMMU for sdm855 



The GPU now generates two SIDs for each context bank
instead of one, one for each TBU. Add support for
using the SMR mask so that we don't run out of SMR
registers due to having twice as many SIDs in use.

Change-Id: I082d338210bbb680502789a15158c8f50726a028
Signed-off-by: default avatarKyle Piefer <kpiefer@codeaurora.org>
parent 62ae26e3

arch/arm64/boot/dts/qcom/sdm855-gpu.dtsi

+4 −5
Original line number Diff line number Diff line
@@ -293,15 +293,14 @@ 
		gfx3d_user: gfx3d_user {

			compatible = "qcom,smmu-kgsl-cb";

			label = "gfx3d_user";

			iommus = <&kgsl_smmu 0x0>, <&kgsl_smmu 0x400>;

			iommus = <&kgsl_smmu 0x0 0x400>;

			qcom,gpu-offset = <0x48000>;

		};



		gfx3d_secure: gfx3d_secure {

			compatible = "qcom,smmu-kgsl-cb";

			label = "gfx3d_secure";

			iommus = <&kgsl_smmu 0x2>, <&kgsl_smmu 0x1>,

					<&kgsl_smmu 0x402>, <&kgsl_smmu 0x401>;

			iommus = <&kgsl_smmu 0x2 0x400>, <&kgsl_smmu 0x1 0x400>;

		};

	};
@@ -377,12 +376,12 @@ 


		gmu_user: gmu_user {

			compatible = "qcom,smmu-gmu-user-cb";

			iommus = <&kgsl_smmu 0x4>, <&kgsl_smmu 0x404>;

			iommus = <&kgsl_smmu 0x4 0x400>;

		};



		gmu_kernel: gmu_kernel {

			compatible = "qcom,smmu-gmu-kernel-cb";

			iommus = <&kgsl_smmu 0x5>, <&kgsl_smmu 0x405>;

			iommus = <&kgsl_smmu 0x5 0x400>;

		};

	};

};