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Commit 7530c9f1 authored by Sujeev Dias's avatar Sujeev Dias Committed by Gerrit - the friendly Code Review server
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dmaengine: gpi: Add support to set LINK_RX bit in TREs 



LINK_RX bit allows clients to link TX DMA TREs with RX DMA
TREs.

CRs-Fixed: 2170554
Change-Id: I3cc004c6bd35033c22d9863d81be7120686a8aa7
Signed-off-by: default avatarSujeev Dias <sdias@codeaurora.org>
parent 63fd32aa

include/linux/msm_gpi.h

+33 −22
Original line number Diff line number Diff line
@@ -38,8 +38,9 @@ enum msm_gpi_tre_type { 
#define MSM_GPI_DMA_W_BUFFER_TRE_DWORD0(ptr) ((u32)ptr)

#define MSM_GPI_DMA_W_BUFFER_TRE_DWORD1(ptr) ((u32)(ptr >> 32))

#define MSM_GPI_DMA_W_BUFFER_TRE_DWORD2(length) (length & 0xFFFFFF)

#define MSM_GPI_DMA_W_BUFFER_TRE_DWORD3(bei, ieot, ieob, ch) ((0x1 << 20) | \

	(0x0 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_DMA_W_BUFFER_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) \

	((0x1 << 20) | (0x0 << 16) | (link_rx << 11) | (bei << 10) | \

	(ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_DMA_W_BUFFER_TRE_GET_LEN(tre) (tre->dword[2] & 0xFFFFFF)

#define MSM_GPI_DMA_W_BUFFER_TRE_SET_LEN(tre, length) (tre->dword[2] = \

	MSM_GPI_DMA_W_BUFFER_TRE_DWORD2(length))
@@ -50,16 +51,18 @@ enum msm_gpi_tre_type { 
#define MSM_GPI_DMA_IMMEDIATE_TRE_DWORD1(d4, d5, d6, d7) ((d7 << 24) | \

	(d6 << 16) | (d5 << 8) | (d4))

#define MSM_GPI_DMA_IMMEDIATE_TRE_DWORD2(length) (length & 0xF)

#define MSM_GPI_DMA_IMMEDIATE_TRE_DWORD3(bei, ieot, ieob, ch) ((0x1 << 20) | \

	(0x1 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_DMA_IMMEDIATE_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) \

	((0x1 << 20) | (0x1 << 16) | (link_rx << 11) | (bei << 10) | \

	(ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_DMA_IMMEDIATE_TRE_GET_LEN(tre) (tre->dword[2] & 0xF)



/* DMA w. Scatter/Gather List TRE */

#define MSM_GPI_SG_LIST_TRE_DWORD0(ptr) ((u32)ptr)

#define MSM_GPI_SG_LIST_TRE_DWORD1(ptr) ((u32)(ptr >> 32))

#define MSM_GPI_SG_LIST_TRE_DWORD2(length) (length & 0xFFFF)

#define MSM_GPI_SG_LIST_TRE_DWORD3(bei, ieot, ieob, ch) ((0x1 << 20) | \

	(0x2 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_SG_LIST_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) ((0x1 << 20) \

	| (0x2 << 16) | (link_rx << 11) | (bei << 10) | (ieot << 9) | \

	(ieob << 8) | ch)



/* SG Element */

#define MSM_GPI_SG_ELEMENT_DWORD0(ptr) ((u32)ptr)
@@ -71,23 +74,26 @@ enum msm_gpi_tre_type { 
#define GPI_CONFIG2_TRE_DWORD0(gr, txp) ((gr << 20) | (txp))

#define GPI_CONFIG2_TRE_DWORD1(txp) (txp)

#define GPI_CONFIG2_TRE_DWORD2 (0)

#define GPI_CONFIG2_TRE_DWORD3(bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x4 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define GPI_CONFIG2_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x4 << 16) | (link_rx << 11) | (bei << 10) | (ieot << 9) | \

	(ieob << 8) | ch)



/* Config3 TRE */

#define GPI_CONFIG3_TRE_DWORD0(rxp) (rxp)

#define GPI_CONFIG3_TRE_DWORD1(rxp) (rxp)

#define GPI_CONFIG3_TRE_DWORD2 (0)

#define GPI_CONFIG3_TRE_DWORD3(bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x5 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define GPI_CONFIG3_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) ((0x2 << 20) \

	| (0x5 << 16) | (link_rx << 11) | (bei << 10) | (ieot << 9) | \

	(ieob << 8) | ch)



/* SPI Go TRE */

#define MSM_GPI_SPI_GO_TRE_DWORD0(flags, cs, command) ((flags << 24) | \

	(cs << 8) | command)

#define MSM_GPI_SPI_GO_TRE_DWORD1 (0)

#define MSM_GPI_SPI_GO_TRE_DWORD2(rx_len) (rx_len)

#define MSM_GPI_SPI_GO_TRE_DWORD3(bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x0 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_SPI_GO_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x0 << 16) | (link_rx << 11) | (bei << 10) | (ieot << 9) | \

	(ieob << 8) | ch)



/* SPI Config0 TRE */

#define MSM_GPI_SPI_CONFIG0_TRE_DWORD0(pack, flags, word_size) ((pack << 24) | \
@@ -96,15 +102,17 @@ enum msm_gpi_tre_type { 
	((it_del << 16) | (cs_clk_del << 8) | iw_del)

#define MSM_GPI_SPI_CONFIG0_TRE_DWORD2(clk_src, clk_div) ((clk_src << 16) | \

	clk_div)

#define MSM_GPI_SPI_CONFIG0_TRE_DWORD3(bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x2 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_SPI_CONFIG0_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) \

	((0x2 << 20) | (0x2 << 16) | (link_rx << 11) | (bei << 10) | \

	(ieot << 9) | (ieob << 8) | ch)



/* UART Go TRE */

#define MSM_GPI_UART_GO_TRE_DWORD0(en_hunt, command) ((en_hunt << 8) | command)

#define MSM_GPI_UART_GO_TRE_DWORD1 (0)

#define MSM_GPI_UART_GO_TRE_DWORD2 (0)

#define MSM_GPI_UART_GO_TRE_DWORD3(bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x0 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_UART_GO_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) ((0x2 << 20) \

	| (0x0 << 16) | (link_rx << 11) | (bei << 10) | (ieot << 9) | \

	(ieob << 8) | ch)



/* UART Config0 TRE */

#define MSM_GPI_UART_CONFIG0_TRE_DWORD0(pack, hunt, flags, parity, sbl, size) \
@@ -114,16 +122,18 @@ enum msm_gpi_tre_type { 
	((rfr_level << 24) | rx_stale)

#define MSM_GPI_UART_CONFIG0_TRE_DWORD2(clk_source, clk_div) \

	((clk_source << 16) | clk_div)

#define MSM_GPI_UART_CONFIG0_TRE_DWORD3(bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x2 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_UART_CONFIG0_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) \

	((0x2 << 20) | (0x2 << 16) | (link_rx << 11) | (bei << 10) | \

	(ieot << 9) | (ieob << 8) | ch)



/* I2C GO TRE */

#define MSM_GPI_I2C_GO_TRE_DWORD0(flags, slave, opcode) \

	((flags << 24) | (slave << 8) | opcode)

#define MSM_GPI_I2C_GO_TRE_DWORD1 (0)

#define MSM_GPI_I2C_GO_TRE_DWORD2(rx_len) (rx_len)

#define MSM_GPI_I2C_GO_TRE_DWORD3(bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x0 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_I2C_GO_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x0 << 16) | (link_rx << 11) | (bei << 10) | (ieot << 9) | \

	(ieob << 8) | ch)



/* I2C Config0 TRE */

#define MSM_GPI_I2C_CONFIG0_TRE_DWORD0(pack, t_cycle, t_high, t_low) \
@@ -132,8 +142,9 @@ enum msm_gpi_tre_type { 
	((inter_delay << 16) | noise_rej)

#define MSM_GPI_I2C_CONFIG0_TRE_DWORD2(clk_src, clk_div) \

	((clk_src << 16) | clk_div)

#define MSM_GPI_I2C_CONFIG0_TRE_DWORD3(bei, ieot, ieob, ch) ((0x2 << 20) | \

	(0x2 << 16) | (bei << 10) | (ieot << 9) | (ieob << 8) | ch)

#define MSM_GPI_I2C_CONFIG0_TRE_DWORD3(link_rx, bei, ieot, ieob, ch) \

	((0x2 << 20) | (0x2 << 16) | (link_rx << 11) | (bei << 10) | \

	(ieot << 9) | (ieob << 8) | ch)



/* cmds to perform by using dmaengine_slave_config() */

enum msm_gpi_ctrl_cmd {