Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 743dc39b authored by Alexander Beykun's avatar Alexander Beykun
Browse files

drm/msm/sde: expose UBWC bw calculation type 



Expose algorithm version of UBWC bandwidth and display core clock
calculation to user space. Display processing clock frequency
calculation should check UBWC bandwidth calculation type and
request display core clock high enough to support UBWC decoders
bandwidth.

Change-Id: I08b0aa1e8fbaf871a9b0b11737808fed64ba3562
Signed-off-by: default avatarAlexander Beykun <abeykun@codeaurora.org>
parent 5fe07b01

Documentation/devicetree/bindings/display/msm/sde.txt

+3 −0
Original line number Diff line number Diff line
@@ -123,6 +123,8 @@ Optional properties: 
- qcom,sde-ubwc-version:	Property to specify the UBWC feature version.

- qcom,sde-ubwc-static:	Property to specify the default UBWC static

				configuration value.

- qcom,sde-ubwc-bw-calc-version:	A u32 property to specify version of UBWC bandwidth

				calculation algorithm

- qcom,sde-ubwc-swizzle:	Property to specify the default UBWC swizzle

				configuration value.

- qcom,sde-smart-panel-align-mode: A u32 property to specify the align mode for
@@ -552,6 +554,7 @@ Example: 
    qcom,sde-ubwc-version = <0x100>;

    qcom,sde-ubwc-static = <0x100>;

    qcom,sde-ubwc-swizzle = <0>;

    qcom,sde-ubwc-bw-calc-version = <0x1>;

    qcom,sde-smart-panel-align-mode = <0xd>;

    qcom,sde-panic-per-pipe;

    qcom,sde-has-src-split;

drivers/gpu/drm/msm/sde/sde_crtc.c

+4 −0
Original line number Diff line number Diff line
@@ -5204,6 +5204,10 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc, 
	sde_kms_info_add_keyint(info, "min_prefill_lines",

			catalog->perf.min_prefill_lines);



	if (catalog->ubwc_bw_calc_version)

		sde_kms_info_add_keyint(info, "ubwc_bw_calc_ver",

				catalog->ubwc_bw_calc_version);



	msm_property_set_blob(&sde_crtc->property_info, &sde_crtc->blob_info,

			info->data, SDE_KMS_INFO_DATALEN(info), CRTC_PROP_INFO);

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+6 −0
Original line number Diff line number Diff line
@@ -154,6 +154,7 @@ enum sde_prop { 
	DEST_SCALER,

	SMART_PANEL_ALIGN_MODE,

	MACROTILE_MODE,

	UBWC_BW_CALC_VERSION,

	SDE_PROP_MAX,

};
@@ -422,6 +423,8 @@ static struct sde_prop_type sde_prop[] = { 
	{SMART_PANEL_ALIGN_MODE, "qcom,sde-smart-panel-align-mode",

			false, PROP_TYPE_U32},

	{MACROTILE_MODE, "qcom,sde-macrotile-mode", false, PROP_TYPE_U32},

	{UBWC_BW_CALC_VERSION, "qcom,sde-ubwc-bw-calc-version", false,

			PROP_TYPE_U32},

};



static struct sde_prop_type sde_perf_prop[] = {
@@ -2889,6 +2892,9 @@ static int sde_parse_dt(struct device_node *np, struct sde_mdss_cfg *cfg) 
	if (!prop_exists[MACROTILE_MODE])

		cfg->macrotile_mode = DEFAULT_SDE_UBWC_MACROTILE_MODE;



	cfg->ubwc_bw_calc_version =

		PROP_VALUE_ACCESS(prop_value, UBWC_BW_CALC_VERSION, 0);



	cfg->mdp[0].ubwc_static = PROP_VALUE_ACCESS(prop_value, UBWC_STATIC, 0);

	if (!prop_exists[UBWC_STATIC])

		cfg->mdp[0].ubwc_static = DEFAULT_SDE_UBWC_STATIC;

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+2 −0
Original line number Diff line number Diff line
@@ -990,6 +990,7 @@ struct sde_perf_cfg { 
 * @has_cdp            Client driven prefetch feature status

 * @has_wb_ubwc        UBWC feature supported on WB

 * @ubwc_version       UBWC feature version (0x0 for not supported)

 * @ubwc_bw_calc_version indicate how UBWC BW has to be calculated

 * @has_sbuf           indicate if stream buffer is available

 * @sbuf_headroom      stream buffer headroom in lines

 * @sbuf_prefill       stream buffer prefill default in lines
@@ -1019,6 +1020,7 @@ struct sde_mdss_cfg { 
	bool has_dim_layer;

	bool has_wb_ubwc;

	u32 ubwc_version;

	u32 ubwc_bw_calc_version;

	bool has_sbuf;

	u32 sbuf_headroom;

	u32 sbuf_prefill;