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Commit 74219b39 authored by Abhijit Kulkarni's avatar Abhijit Kulkarni
Browse files

drm/msm/sde: fix restore handling for encoders 



When physical cmd mode encoders are restored after power collapse
the interface flush bits get cleared when the incoming commit
is triggered. This change fixes the trigger kickoff pending
functionality by checking if a restore is in progress. Hw prepare
is handled during the restore phase.

Change-Id: I45253c604edf303eb6fbc3e7fb1110e50b67f1f8
Signed-off-by: default avatarAbhijit Kulkarni <kabhijit@codeaurora.org>
Signed-off-by: default avatarVeera Sundaram Sankaran <veeras@codeaurora.org>
parent cc972f42

drivers/gpu/drm/msm/sde/sde_encoder.c

+18 −2
Original line number Diff line number Diff line
@@ -205,6 +205,7 @@ enum sde_enc_rc_states { 
 * @input_handler:			handler for input device events

 * @topology:                   topology of the display

 * @vblank_enabled:		boolean to track userspace vblank vote

 * @idle_pc_restore:		flag to indicate idle_pc_restore happened

 * @rsc_config:			rsc configuration for display vtotal, fps, etc.

 * @cur_conn_roi:		current connector roi

 * @prv_conn_roi:		previous connector roi to optimize if unchanged
@@ -251,6 +252,7 @@ struct sde_encoder_virt { 
	struct input_handler *input_handler;

	struct msm_display_topology topology;

	bool vblank_enabled;

	bool idle_pc_restore;



	struct sde_rsc_cmd_config rsc_config;

	struct sde_rect cur_conn_roi;
@@ -2713,11 +2715,18 @@ void sde_encoder_virt_restore(struct drm_encoder *drm_enc) 
	sde_enc = to_sde_encoder_virt(drm_enc);

	memset(&sde_enc->cur_master->intf_cfg_v1, 0,

			sizeof(sde_enc->cur_master->intf_cfg_v1));

	sde_enc->idle_pc_restore = true;



	for (i = 0; i < sde_enc->num_phys_encs; i++) {

		struct sde_encoder_phys *phys = sde_enc->phys_encs[i];



		if (phys && (phys != sde_enc->cur_master) && phys->ops.restore)

		if (!phys)

			continue;



		if (phys->hw_ctl && phys->hw_ctl->ops.clear_pending_flush)

			phys->hw_ctl->ops.clear_pending_flush(phys->hw_ctl);



		if ((phys != sde_enc->cur_master) && phys->ops.restore)

			phys->ops.restore(phys);

	}
@@ -3584,7 +3593,13 @@ void sde_encoder_trigger_kickoff_pending(struct drm_encoder *drm_enc) 


		if (phys && phys->hw_ctl) {

			ctl = phys->hw_ctl;

			if (ctl->ops.clear_pending_flush)

			/*

			 * avoid clearing the pending flush during the first

			 * frame update after idle power collpase as the

			 * restore path would have updated the pending flush

			 */

			if (!sde_enc->idle_pc_restore &&

					ctl->ops.clear_pending_flush)

				ctl->ops.clear_pending_flush(ctl);



			/* update only for command mode primary ctl */
@@ -3594,6 +3609,7 @@ void sde_encoder_trigger_kickoff_pending(struct drm_encoder *drm_enc) 
				ctl->ops.trigger_pending(ctl);

		}

	}

	sde_enc->idle_pc_restore = false;

}



static void _sde_encoder_setup_dither(struct sde_encoder_phys *phys)