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Commit 734cc8dd authored by Srikanth Uyyala's avatar Srikanth Uyyala Committed by Gerrit - the friendly Code Review server
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msm: isp: update the software irq mask 



Update the software irq mask after hardware programming is done.
This will ensure software mask is reflecting the hardware mask.

Change-Id: Iab2876c544b4d968b96a2bd5716b3591b65ac9b4
Signed-off-by: default avatarSrikanth Uyyala <suyyala@codeaurora.org>
parent 29444f60

drivers/media/platform/msm/camera_v2/isp/msm_isp47.c

+11 −4
Original line number Diff line number Diff line
@@ -179,18 +179,25 @@ void msm_vfe47_config_irq(struct vfe_device *vfe_dev, 
		vfe_dev->irq1_mask &= ~irq1_mask;

		break;

	case MSM_ISP_IRQ_SET:

		vfe_dev->irq0_mask = irq0_mask;

		vfe_dev->irq1_mask = irq1_mask;

		/* clear the IRQ */

		msm_camera_io_w_mb(irq0_mask, vfe_dev->vfe_base + 0x64);

		msm_camera_io_w_mb(irq1_mask, vfe_dev->vfe_base + 0x68);

		msm_camera_io_w_mb(0x1, vfe_dev->vfe_base + 0x58);

		/* set the HW mask */

		msm_camera_io_w_mb(irq0_mask, vfe_dev->vfe_base + 0x5C);

		msm_camera_io_w_mb(irq1_mask, vfe_dev->vfe_base + 0x60);

		/* update the software Mask */

		vfe_dev->irq0_mask = irq0_mask;

		vfe_dev->irq1_mask = irq1_mask;

		break;

	}

	if (oper != MSM_ISP_IRQ_SET) {

		msm_camera_io_w_mb(vfe_dev->irq0_mask,

				vfe_dev->vfe_base + 0x5C);

		msm_camera_io_w_mb(vfe_dev->irq1_mask,

				vfe_dev->vfe_base + 0x60);

	}

}



static int32_t msm_vfe47_init_dt_parms(struct vfe_device *vfe_dev,

	struct msm_vfe_hw_init_parms *dt_parms, void __iomem *dev_mem_base)

drivers/media/platform/msm/camera_v2/isp/msm_isp48.c

+13 −4
Original line number Diff line number Diff line
@@ -488,22 +488,31 @@ void msm_vfe48_dual_config_irq(struct vfe_device *vfe_dev, 
			vfe_dev->irq1_mask &= ~irq1_mask;

			break;

		case MSM_ISP_IRQ_SET:

			vfe_dev->dual_irq_mask = irq0_mask;

			vfe_dev->irq1_mask = irq1_mask;

			/* clear the IRQ */

			msm_camera_io_w_mb(irq0_mask,

				vfe_dev->camss_base + 0x13C);

			msm_camera_io_w_mb(irq1_mask, vfe_dev->vfe_base + 0x68);

			msm_camera_io_w_mb(0x1,

				vfe_dev->camss_base + 0x134);

			/* set the HW mask */

			msm_camera_io_w_mb(irq0_mask,

						vfe_dev->camss_base + 0x138);

			msm_camera_io_w_mb(irq1_mask,

						vfe_dev->vfe_base + 0x60);

			/* update the software Mask */

			vfe_dev->dual_irq_mask = irq0_mask;

			vfe_dev->irq1_mask = irq1_mask;

			break;

		}

		/* Program the DUAL_VFE_IRQ_MASK and VFE_IRQ_MASK_1 */

		if (oper != MSM_ISP_IRQ_SET) {

			msm_camera_io_w_mb(vfe_dev->dual_irq_mask,

					vfe_dev->camss_base + 0x138);

			msm_camera_io_w_mb(vfe_dev->irq1_mask,

					vfe_dev->vfe_base + 0x60);

		}

	}

}



struct msm_vfe_hardware_info vfe48_hw_info = {

	.num_iommu_ctx = 1,