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Commit 72da0b07 authored by Jan Beulich's avatar Jan Beulich Committed by Jesse Barnes
Browse files

x86: constify PCI raw ops structures 



As with any other such change, the goal is to prevent inadvertent
writes to these structures (assuming DEBUG_RODATA is enabled), and to
separate data (possibly frequently) written to from such never getting
modified.

Reviewed-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarJan Beulich <jbeulich@novell.com>
Signed-off-by: default avatarJesse Barnes <jbarnes@virtuousgeek.org>
parent a94d072b

arch/x86/include/asm/pci_x86.h

+3 −3
Original line number Diff line number Diff line
@@ -99,10 +99,10 @@ struct pci_raw_ops { 
						int reg, int len, u32 val);

};



extern struct pci_raw_ops *raw_pci_ops;

extern struct pci_raw_ops *raw_pci_ext_ops;

extern const struct pci_raw_ops *raw_pci_ops;

extern const struct pci_raw_ops *raw_pci_ext_ops;



extern struct pci_raw_ops pci_direct_conf1;

extern const struct pci_raw_ops pci_direct_conf1;

extern bool port_cf9_safe;



/* arch_initcall level */

arch/x86/pci/ce4100.c

+1 −1
Original line number Diff line number Diff line
@@ -304,7 +304,7 @@ static int ce4100_conf_write(unsigned int seg, unsigned int bus, 
	return pci_direct_conf1.write(seg, bus, devfn, reg, len, value);

}



struct pci_raw_ops ce4100_pci_conf = {

static const struct pci_raw_ops ce4100_pci_conf = {

	.read =	ce4100_conf_read,

	.write = ce4100_conf_write,

};

arch/x86/pci/common.c

+2 −2
Original line number Diff line number Diff line
@@ -33,8 +33,8 @@ int noioapicreroute = 1; 
int pcibios_last_bus = -1;

unsigned long pirq_table_addr;

struct pci_bus *pci_root_bus;

struct pci_raw_ops *raw_pci_ops;

struct pci_raw_ops *raw_pci_ext_ops;

const struct pci_raw_ops *__read_mostly raw_pci_ops;

const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;



int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,

						int reg, int len, u32 *val)

arch/x86/pci/direct.c

+3 −3
Original line number Diff line number Diff line
@@ -79,7 +79,7 @@ static int pci_conf1_write(unsigned int seg, unsigned int bus, 


#undef PCI_CONF1_ADDRESS



struct pci_raw_ops pci_direct_conf1 = {

const struct pci_raw_ops pci_direct_conf1 = {

	.read =		pci_conf1_read,

	.write =	pci_conf1_write,

};
@@ -175,7 +175,7 @@ static int pci_conf2_write(unsigned int seg, unsigned int bus, 


#undef PCI_CONF2_ADDRESS



struct pci_raw_ops pci_direct_conf2 = {

static const struct pci_raw_ops pci_direct_conf2 = {

	.read =		pci_conf2_read,

	.write =	pci_conf2_write,

};
@@ -191,7 +191,7 @@ struct pci_raw_ops pci_direct_conf2 = { 
 * This should be close to trivial, but it isn't, because there are buggy

 * chipsets (yes, you guessed it, by Intel and Compaq) that have no class ID.

 */

static int __init pci_sanity_check(struct pci_raw_ops *o)

static int __init pci_sanity_check(const struct pci_raw_ops *o)

{

	u32 x = 0;

	int year, devfn;

arch/x86/pci/mmconfig_32.c

+1 −1
Original line number Diff line number Diff line
@@ -117,7 +117,7 @@ static int pci_mmcfg_write(unsigned int seg, unsigned int bus, 
	return 0;

}



static struct pci_raw_ops pci_mmcfg = {

static const struct pci_raw_ops pci_mmcfg = {

	.read =		pci_mmcfg_read,

	.write =	pci_mmcfg_write,

};