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Commit 71c76a08 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/amdgpu: fix GTT offset handling



Otherwise we run into problems on 32bit systems with more than 4GB GART.

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent d28d6e6f
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+5 −5
Original line number Original line Diff line number Diff line
@@ -648,7 +648,7 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
			return r;
			return r;
		}
		}
	}
	}
	gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
	gtt->offset = (u64)bo_mem->start << PAGE_SHIFT;
	if (!ttm->num_pages) {
	if (!ttm->num_pages) {
		WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
		WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
		     ttm->num_pages, bo_mem, ttm);
		     ttm->num_pages, bo_mem, ttm);
@@ -663,8 +663,8 @@ static int amdgpu_ttm_backend_bind(struct ttm_tt *ttm,
		ttm->pages, gtt->ttm.dma_address, flags);
		ttm->pages, gtt->ttm.dma_address, flags);


	if (r) {
	if (r) {
		DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
		DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
			  ttm->num_pages, (unsigned)gtt->offset);
			  ttm->num_pages, gtt->offset);
		return r;
		return r;
	}
	}
	spin_lock(&gtt->adev->gtt_list_lock);
	spin_lock(&gtt->adev->gtt_list_lock);
@@ -689,8 +689,8 @@ int amdgpu_ttm_recover_gart(struct amdgpu_device *adev)
				     flags);
				     flags);
		if (r) {
		if (r) {
			spin_unlock(&adev->gtt_list_lock);
			spin_unlock(&adev->gtt_list_lock);
			DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
			DRM_ERROR("failed to bind %lu pages at 0x%08llX\n",
				  gtt->ttm.ttm.num_pages, (unsigned)gtt->offset);
				  gtt->ttm.ttm.num_pages, gtt->offset);
			return r;
			return r;
		}
		}
	}
	}