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Commit 713a7a17 authored by Mitul Golani's avatar Mitul Golani
Browse files

ARM: dts: msm: Add default pinctrl state for sm8150 HSUART 



when device gets probed, kernel picks up default state and sets
pinctrl to that configuration. Since default state contains UART
functionality, it remains high which consumes power.

To resolve power leakage issue, add additional active state to
configure UART functionality and keep default state for the GPIO
state during probe.

Change-Id: Ia5343d709ecc2816ff35edf3c00c60804f6cfc58
Signed-off-by: default avatarMitul Golani <mgolani@codeaurora.org>
parent ddd8ee59

arch/arm64/boot/dts/qcom/sm8150-pinctrl.dtsi

+14 −0
Original line number Diff line number Diff line
@@ -253,6 +253,20 @@ 
		};



		qupv3_se13_4uart_pins: qupv3_se13_4uart_pins {

			qupv3_se13_pins_default: qupv3_se13_pins_default {

				mux {

					pins = "gpio43", "gpio44", "gpio45",

								"gpio46";

					function = "gpio";

					};



				config {

					pins = "gpio43", "gpio44", "gpio45",

								"gpio46";

					drive-strength = <2>;

					bias-disable;

					};

			};

			qupv3_se13_ctsrx: qupv3_se13_ctsrx {

				mux {

					pins = "gpio43", "gpio46";

arch/arm64/boot/dts/qcom/sm8150-qupv3.dtsi

+5 −4
Original line number Diff line number Diff line 
/* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and
@@ -420,11 +420,12 @@ 
		clocks = <&clock_gcc GCC_QUPV3_WRAP2_S3_CLK>,

			<&clock_gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>,

			<&clock_gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;

		pinctrl-names = "default", "sleep";

		pinctrl-0 = <&qupv3_se13_ctsrx>, <&qupv3_se13_rts>,

						<&qupv3_se13_tx>;

		pinctrl-names = "default", "active", "sleep";

		pinctrl-0 = <&qupv3_se13_pins_default>;

		pinctrl-1 = <&qupv3_se13_ctsrx>, <&qupv3_se13_rts>,

						<&qupv3_se13_tx>;

		pinctrl-2 = <&qupv3_se13_ctsrx>, <&qupv3_se13_rts>,

						<&qupv3_se13_tx>;

		interrupts-extended = <&pdc GIC_SPI 585 0>,

				<&tlmm 46 0>;

		qcom,wrapper-core = <&qupv3_2>;