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Commit 70c9afb9 authored by Diptanshu Jamgade's avatar Diptanshu Jamgade
Browse files

clk: qcom: gcc: Update source for gmu and mdss_ahb clk on TRINKET



Update the gmu clock source from gpll0_out_main to
gcc_gpu_gpll0_clk_src in gpucc for Trinket. Also update the
mdss_ahb clk source from gpll0_out_main to
gcc_disp_gpll0_div_clk_src.

Change-Id: Iad8ecaff58c8842cb64ce05f225b5b4418002a37
Signed-off-by: default avatarDiptanshu Jamgade <djamgade@codeaurora.org>
parent 56a32ab1
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+2 −2
Original line number Diff line number Diff line
@@ -94,7 +94,7 @@ static const struct parent_map disp_cc_parent_map_3[] = {
static const char * const disp_cc_parent_names_3[] = {
	"bi_tcxo",
	"disp_cc_pll0_out_main",
	"gpll0_out_main",
	"gcc_disp_gpll0_div_clk_src",
	"core_bi_pll_test_se",
};

@@ -106,7 +106,7 @@ static const struct parent_map disp_cc_parent_map_4[] = {

static const char * const disp_cc_parent_names_4[] = {
	"bi_tcxo",
	"gpll0_out_main",
	"gcc_disp_gpll0_div_clk_src",
	"core_bi_pll_test_se",
};

+1 −1
Original line number Diff line number Diff line
@@ -2954,7 +2954,7 @@ static struct clk_branch gcc_disp_gpll0_div_clk_src = {
		.hw.init = &(struct clk_init_data){
			.name = "gcc_disp_gpll0_div_clk_src",
			.parent_names = (const char *[]){
				"gpll0_out_early",
				"gpll0_out_main",
			},
			.num_parents = 1,
			.ops = &clk_branch2_ops,
+2 −2
Original line number Diff line number Diff line
@@ -67,7 +67,7 @@ static const char * const gpu_cc_parent_names_0[] = {
	"bi_tcxo",
	"gpu_cc_pll0_out_main",
	"gpu_cc_pll1_out_main",
	"gpll0_out_main",
	"gcc_gpu_gpll0_clk_src",
	"gpll0_out_main_div",
	"core_bi_pll_test_se",
};
@@ -88,7 +88,7 @@ static const char * const gpu_cc_parent_names_1[] = {
	"gpu_cc_pll0_out_aux2",
	"gpu_cc_pll1_out_aux",
	"gpu_cc_pll1_out_aux2",
	"gpll0_out_main",
	"gcc_gpu_gpll0_clk_src",
	"core_bi_pll_test_se",
};