Merge "ARM: dts: msm: Enable the venus subsystem for sdmshrike"

#include <dt-bindings/clock/qcom,scc-sm8150.h>

#include <dt-bindings/clock/qcom,cpucc-sm8150.h>

#include <dt-bindings/clock/qcom,gpucc-sm8150.h>

#include <dt-bindings/clock/qcom,videocc-sm8150.h>

#include <dt-bindings/clock/qcom,camcc-sdmshrike.h>

#include <dt-bindings/clock/qcom,aop-qmp.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

		#reset-cells = <1>;

	};

	clock_videocc: qcom,videocc@ab00000 {

		compatible = "qcom,videocc-sm8150-v2", "syscon";

		reg = <0xab00000 0x10000>;

		reg-names = "cc_base";

		vdd_mm-supply = <&VDD_MMCX_LEVEL>;

		clock-names = "cfg_ahb_clk";

		clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>;

		#clock-cells = <1>;

		#reset-cells = <1>;

	};

	clock_npucc: qcom,npucc@9910000 {

		compatible = "qcom,npucc-sm8150";

		reg = <0x9910000 0x10000>;

		mbox-names = "cdsp-pil";

	};

	qcom,venus@aae0000 {

		compatible = "qcom,pil-tz-generic";

		reg = <0xaae0000 0x4000>;

		vdd-supply = <&mvsc_gdsc>;

		qcom,proxy-reg-names = "vdd";

		qcom,complete-ramdump;

		clocks = <&clock_videocc VIDEO_CC_XO_CLK>,

			<&clock_videocc VIDEO_CC_MVSC_CORE_CLK>,

			<&clock_videocc VIDEO_CC_IRIS_AHB_CLK>;

		clock-names = "xo", "core", "ahb";

		qcom,proxy-clock-names = "xo",  "core", "ahb";

		qcom,core-freq = <200000000>;

		qcom,ahb-freq = <200000000>;

		qcom,pas-id = <9>;

		qcom,msm-bus,name = "pil-venus";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

			<63 512 0 0>,

			<63 512 0 304000>;

		qcom,proxy-timeout-ms = <100>;

		qcom,firmware-name = "venus";

		memory-region = <&pil_video_mem>;

	};

	wdog: qcom,wdt@17c10000 {

		compatible = "qcom,msm-watchdog";

		reg = <0x17c10000 0x1000>;