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Commit 6f91c601 authored by Maxime Ripard's avatar Maxime Ripard
Browse files

clk: sunxi-ng: div: Add mux table macros 



Add some macros to ease the declaration of clocks that are using them.

Signed-off-by: default avatarMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: default avatarChen-Yu Tsai <wens@csie.org>
parent c6e6c96d

drivers/clk/sunxi-ng/ccu_div.h

+21 −7
Original line number Diff line number Diff line
@@ -77,13 +77,16 @@ struct ccu_div { 
				      _shift, _width, _table, 0,	\

				      _flags)



#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,	\

				  _mshift, _mwidth, _muxshift, _muxwidth, \

#define SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name,			\

					_parents, _table,		\

					_reg,				\

					_mshift, _mwidth,		\

					_muxshift, _muxwidth,		\

					_gate, _flags)			\

	struct ccu_div _struct = {					\

		.enable	= _gate,					\

		.div	= _SUNXI_CCU_DIV(_mshift, _mwidth),		\

		.mux	= _SUNXI_CCU_MUX(_muxshift, _muxwidth),		\

		.mux	= _SUNXI_CCU_MUX_TABLE(_muxshift, _muxwidth, _table), \

		.common	= {						\

			.reg		= _reg,				\

			.hw.init	= CLK_HW_INIT_PARENTS(_name,	\
@@ -93,11 +96,22 @@ struct ccu_div { 
		},							\

	}



#define SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,	\

				  _mshift, _mwidth, _muxshift, _muxwidth, \

				  _gate, _flags)			\

	SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name,			\

					_parents, NULL,			\

					_reg, _mshift, _mwidth,		\

					_muxshift, _muxwidth,		\

					_gate, _flags)



#define SUNXI_CCU_M_WITH_MUX(_struct, _name, _parents, _reg,		\

			     _mshift, _mwidth, _muxshift, _muxwidth,	\

			     _flags)					\

	SUNXI_CCU_M_WITH_MUX_GATE(_struct, _name, _parents, _reg,	\

				  _mshift, _mwidth, _muxshift, _muxwidth, \

	SUNXI_CCU_M_WITH_MUX_TABLE_GATE(_struct, _name,			\

					_parents, NULL,			\

					_reg, _mshift, _mwidth,		\

					_muxshift, _muxwidth,		\

					0, _flags)