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Commit 6f255864 authored by Srinivas Rao L's avatar Srinivas Rao L
Browse files

ARM: dts: msm: Add PDC interrupt controller for SDM640 



Add pdc interrupt controller as SOC interrupt parent and as a child
domain under intc.

Change-Id: I898a1ee75f97dca049b129044f3a448b36e628ac
Signed-off-by: default avatarSrinivas Rao L <lsrao@codeaurora.org>
parent 7f1e60f3

arch/arm64/boot/dts/qcom/sdm640.dtsi

+9 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ 
	model = "Qualcomm Technologies, Inc. SDM640";

	compatible = "qcom,sdm640";

	qcom,msm-id = <355 0x0>;

	interrupt-parent = <&intc>;

	interrupt-parent = <&pdc>;



	aliases {

		serial0 = &qupv3_se0_2uart;
@@ -481,6 +481,14 @@ 
		interrupt-parent = <&intc>;

	};



	pdc: interrupt-controller@b220000{

		compatible = "qcom,pdc-sdm640";

		reg = <0xb220000 0x400>;

		#interrupt-cells = <3>;

		interrupt-parent = <&intc>;

		interrupt-controller;

	};



	timer {

		compatible = "arm,armv8-timer";

		interrupts = <1 1 0xf08>,