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Commit 6eb18f8b authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon/kms: MC setup changes for fusion APUs 



- CONFIG_MEMSIZE is in bytes on fusion.
- FB_BASE and FB_TOP are finer grained.

Signed-off-by: default avatarAlex Deucher <alexdeucher@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 0ef0c1f7

drivers/gpu/drm/radeon/evergreen.c

+9 −3
Original line number Diff line number Diff line
@@ -1940,9 +1940,15 @@ int evergreen_mc_init(struct radeon_device *rdev) 
	rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0);

	rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0);

	/* Setup GPU memory space */

	if (rdev->flags & RADEON_IS_IGP) {

		/* size in bytes on fusion */

		rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);

		rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

	} else {

		/* size in MB on evergreen */

		rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

		rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

	}

	rdev->mc.visible_vram_size = rdev->mc.aper_size;

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	r700_vram_gtt_location(rdev, &rdev->mc);

drivers/gpu/drm/radeon/rv770.c

+9 −1
Original line number Diff line number Diff line
@@ -237,6 +237,12 @@ static void rv770_mc_program(struct radeon_device *rdev) 
			rdev->mc.vram_end >> 12);

	}

	WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0);

	if (rdev->flags & RADEON_IS_IGP) {

		tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF;

		tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24;

		tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20;

		WREG32(MC_FUS_VM_FB_OFFSET, tmp);

	}

	tmp = ((rdev->mc.vram_end >> 24) & 0xFFFF) << 16;

	tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF);

	WREG32(MC_VM_FB_LOCATION, tmp);
@@ -1035,8 +1041,10 @@ void r700_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc) 
				mc->vram_end, mc->real_vram_size >> 20);

	} else {

		u64 base = 0;

		if (rdev->flags & RADEON_IS_IGP)

		if (rdev->flags & RADEON_IS_IGP) {

			base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;

			base |= RREG32(MC_FUS_VM_FB_OFFSET) & 0x00F00000;

		}

		radeon_vram_location(rdev, &rdev->mc, base);

		rdev->mc.gtt_base_align = 0;

		radeon_gtt_location(rdev, mc);

drivers/gpu/drm/radeon/rv770d.h

+1 −0
Original line number Diff line number Diff line
@@ -158,6 +158,7 @@ 
#define	MC_VM_AGP_BOT					0x202C

#define	MC_VM_AGP_BASE					0x2030

#define	MC_VM_FB_LOCATION				0x2024

#define	MC_FUS_VM_FB_OFFSET				0x2898

#define	MC_VM_MB_L1_TLB0_CNTL				0x2234

#define	MC_VM_MB_L1_TLB1_CNTL				0x2238

#define	MC_VM_MB_L1_TLB2_CNTL				0x223C