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Commit 6c9cd8bd authored by Odelu Kukatla's avatar Odelu Kukatla
Browse files

ARM: dts: msm: Introduce bus topology for QCS405 



Bus topology is the representation of bus connections
in SOC and is required for the bus driver to serve the
bandwidth requests from clients.

Change-Id: I74c105bf43d641397cd18ddce60f0b3daa33e690
Signed-off-by: default avatarOdelu Kukatla <okukatla@codeaurora.org>
parent 99e4dcfb

arch/arm64/boot/dts/qcom/qcs405-bus.dtsi

0 → 100644
+799 −0
Original line number Diff line number Diff line 
/* Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include <dt-bindings/msm/msm-bus-ids.h>



&soc {

	ad_hoc_bus: ad-hoc-bus@580000 {

		compatible = "qcom,msm-bus-device";

		reg = <0x580000 0x23080>,

			<0x400000 0x80000>,

			<0x500000 0x15080>;

		reg-names = "snoc-base", "bimc-base", "pcnoc-base";



		/*Buses*/

		fab_bimc: fab-bimc {

			cell-id = <MSM_BUS_FAB_BIMC>;

			label = "fab-bimc";

			qcom,fab-dev;

			qcom,base-name = "bimc-base";

			qcom,bus-type = <2>;

			qcom,bypass-qos-prg;

			qcom,util-fact = <153>;

			clock-names = "bus_clk", "bus_a_clk";

			clocks = <&clock_rpmcc BIMC_MSMBUS_CLK>,

				<&clock_rpmcc BIMC_MSMBUS_A_CLK>;

		};



		fab_pcnoc: fab-pcnoc {

			cell-id = <MSM_BUS_FAB_PERIPH_NOC>;

			label = "fab-pcnoc";

			qcom,fab-dev;

			qcom,base-name = "pcnoc-base";

			qcom,bypass-qos-prg;

			qcom,bus-type = <1>;

			clock-names = "bus_clk", "bus_a_clk";

			clocks = <&clock_rpmcc PNOC_MSMBUS_CLK>,

				<&clock_rpmcc PNOC_MSMBUS_A_CLK>;

		};



		fab_snoc: fab-snoc {

			cell-id = <MSM_BUS_FAB_SYS_NOC>;

			label = "fab-snoc";

			qcom,fab-dev;

			qcom,base-name = "snoc-base";

			qcom,bypass-qos-prg;

			qcom,bus-type = <1>;

			clock-names = "bus_clk", "bus_a_clk";

			clocks = <&clock_rpmcc SNOC_MSMBUS_CLK>,

				<&clock_rpmcc SNOC_MSMBUS_A_CLK>;

		};



		/*BIMC Masters*/

		mas_apps_proc: mas-apps-proc {

			cell-id = <MSM_BUS_MASTER_AMPSS_M0>;

			label = "mas-apps-proc";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_ebi &slv_bimc_snoc>;

			qcom,bus-dev = <&fab_bimc>;

			qcom,mas-rpm-id = <ICBID_MASTER_APPSS_PROC>;

		};



		mas_oxili: mas-oxili {

			cell-id = <MSM_BUS_MASTER_GRAPHICS_3D>;

			label = "mas-oxili";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,qport = <2>;

			qcom,qos-mode = "fixed";

			qcom,connections = <&slv_ebi &slv_bimc_snoc>;

			qcom,prio-lvl = <0>;

			qcom,prio-rd = <0>;

			qcom,prio-wr = <0>;

			qcom,bus-dev = <&fab_bimc>;

			qcom,mas-rpm-id = <ICBID_MASTER_GFX3D>;

		};



		mas_mdp: mas-mdp {

			cell-id = <MSM_BUS_MASTER_MDP_PORT0>;

			label = "mas-mdp";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,qport = <4>;

			qcom,qos-mode = "fixed";

			qcom,connections = <&slv_ebi &slv_bimc_snoc>;

			qcom,prio-lvl = <1>;

			qcom,prio-rd = <1>;

			qcom,prio-wr = <1>;

			qcom,bus-dev = <&fab_bimc>;

			qcom,mas-rpm-id = <ICBID_MASTER_MDP>;

		};



		mas_snoc_bimc_1: mas-snoc-bimc-1 {

			cell-id = <MSM_BUS_SNOC_BIMC_1_MAS>;

			label = "mas-snoc-bimc-1";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_ebi>;

			qcom,bus-dev = <&fab_bimc>;

			qcom,mas-rpm-id = <ICBID_MASTER_SNOC_BIMC_1>;

		};



		mas_tcu_0: mas-tcu-0 {

			cell-id = <MSM_BUS_MASTER_TCU_0>;

			label = "mas-tcu-0";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,qport = <6>;

			qcom,qos-mode = "fixed";

			qcom,connections = <&slv_ebi &slv_bimc_snoc>;

			qcom,prio-lvl = <2>;

			qcom,prio-rd = <2>;

			qcom,prio-wr = <2>;

			qcom,bus-dev = <&fab_bimc>;

			qcom,mas-rpm-id = <ICBID_MASTER_TCU_0>;

		};



		/*PCNOC Masters*/

		mas_spdm: mas-spdm {

			cell-id = <MSM_BUS_MASTER_SPDM>;

			label = "mas-spdm";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,qport = <5>;

			qcom,qos-mode = "fixed";

			qcom,connections = <&pcnoc_int_3>;

			qcom,prio1 = <1>;

			qcom,prio0 = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_SPDM>;

		};



		mas_blsp_1: mas-blsp-1 {

			cell-id = <MSM_BUS_MASTER_BLSP_1>;

			label = "mas-blsp-1";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&pcnoc_int_3>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_BLSP_1>;

		};



		mas_blsp_2: mas-blsp-2 {

			cell-id = <MSM_BUS_MASTER_BLSP_2>;

			label = "mas-blsp-2";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&pcnoc_int_3>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_BLSP_2>;

		};



		mas_xi_usb_hs1: mas-xi-usb-hs1 {

			cell-id = <MSM_BUS_MASTER_XM_USB_HS1>;

			label = "mas-xi-usb-hs1";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&pcnoc_int_0>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_XI_USB_HS1>;

			qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10

				 &pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6

				 &pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;

		};



		mas_crypto: mas-crypto {

			cell-id = <MSM_BUS_MASTER_CRYPTO_CORE0>;

			label = "mas-crypto";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,connections = <&slv_pcnoc_snoc &pcnoc_int_2>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_CRYPTO_CORE0>;

			qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10

				 &pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6

				 &pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;

		};



		mas_sdcc_1: mas-sdcc-1 {

			cell-id = <MSM_BUS_MASTER_SDCC_1>;

			label = "mas-sdcc-1";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&pcnoc_int_0>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_SDCC_1>;

			qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10

				 &pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6

				 &pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;

		};



		mas_sdcc_2: mas-sdcc-2 {

			cell-id = <MSM_BUS_MASTER_SDCC_2>;

			label = "mas-sdcc-2";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&pcnoc_int_0>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_SDCC_2>;

			qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10

				 &pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6

				 &pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;

		};



		mas_snoc_pcnoc: mas-snoc-pcnoc {

			cell-id = <MSM_BUS_SNOC_PNOC_MAS>;

			label = "mas-snoc-pcnoc";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&pcnoc_int_2>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_SNOC_PCNOC>;

		};



		mas_qpic: mas-qpic {

			cell-id = <MSM_BUS_MASTER_QPIC>;

			label = "mas-qpic";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,qport = <14>;

			qcom,qos-mode = "fixed";

			qcom,connections = <&pcnoc_int_0>;

			qcom,prio1 = <1>;

			qcom,prio0 = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_QPIC>;

			qcom,blacklist = <&pcnoc_s_0 &pcnoc_s_1 &pcnoc_s_10

				 &pcnoc_s_2 &pcnoc_s_4 &pcnoc_s_6

				 &pcnoc_s_7 &pcnoc_s_8 &pcnoc_s_9>;

		};



		/*SNOC Masters*/

		mas_qdss_bam: mas-qdss-bam {

			cell-id = <MSM_BUS_MASTER_QDSS_BAM>;

			label = "mas-qdss-bam";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,qport = <11>;

			qcom,qos-mode = "fixed";

			qcom,connections = <&qdss_int>;

			qcom,prio1 = <1>;

			qcom,prio0 = <1>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_QDSS_BAM>;

		};



		mas_bimc_snoc: mas-bimc-snoc {

			cell-id = <MSM_BUS_BIMC_SNOC_MAS>;

			label = "mas-bimc-snoc";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_cats_1 &slv_cats_0

				 &snoc_int_1 &snoc_int_0>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_BIMC_SNOC>;

		};



		mas_pcnoc_snoc: mas-pcnoc-snoc {

			cell-id = <MSM_BUS_PNOC_SNOC_MAS>;

			label = "mas-pcnoc-snoc";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_snoc_bimc_1

				&snoc_int_2 &snoc_int_0>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PNOC_SNOC>;

		};



		mas_qdss_etr: mas-qdss-etr {

			cell-id = <MSM_BUS_MASTER_QDSS_ETR>;

			label = "mas-qdss-etr";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,qport = <10>;

			qcom,qos-mode = "fixed";

			qcom,connections = <&qdss_int>;

			qcom,prio1 = <1>;

			qcom,prio0 = <1>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_QDSS_ETR>;

		};



		/*Internal nodes*/

		pcnoc_int_0: pcnoc-int-0 {

			cell-id = <MSM_BUS_PNOC_INT_0>;

			label = "pcnoc-int-0";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_pcnoc_snoc &pcnoc_int_2>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_INT_0>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_INT_0>;

		};



		pcnoc_int_2: pcnoc-int-2 {

			cell-id = <MSM_BUS_PNOC_INT_2>;

			label = "pcnoc-int-2";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&pcnoc_s_10 &slv_tcu &pcnoc_s_2

				 &pcnoc_s_3 &pcnoc_s_0

				 &pcnoc_s_1 &pcnoc_s_6

				 &pcnoc_s_7 &pcnoc_s_4

				 &pcnoc_s_8 &pcnoc_s_9>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_INT_2>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_INT_2>;

		};



		pcnoc_int_3: pcnoc-int-3 {

			cell-id = <MSM_BUS_PNOC_INT_3>;

			label = "pcnoc-int-3";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_pcnoc_snoc>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_INT_3>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_INT_3>;

		};



		pcnoc_s_0: pcnoc-s-0 {

			cell-id = <MSM_BUS_PNOC_SLV_0>;

			label = "pcnoc-s-0";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_prng &slv_spdm &slv_pdm>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_0>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_0>;

		};



		pcnoc_s_1: pcnoc-s-1 {

			cell-id = <MSM_BUS_PNOC_SLV_1>;

			label = "pcnoc-s-1";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_tcsr>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_1>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_1>;

		};



		pcnoc_s_2: pcnoc-s-2 {

			cell-id = <MSM_BUS_PNOC_SLV_2>;

			label = "pcnoc-s-2";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,connections = <&slv_gpu_cfg>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_2>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_2>;

		};



		pcnoc_s_3: pcnoc-s-3 {

			cell-id = <MSM_BUS_PNOC_SLV_3>;

			label = "pcnoc-s-3";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_message_ram>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_3>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_3>;

		};



		pcnoc_s_4: pcnoc-s-4 {

			cell-id = <MSM_BUS_PNOC_SLV_4>;

			label = "pcnoc-s-4";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_snoc_cfg>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_4>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_4>;

		};



		pcnoc_s_6: pcnoc-s-6 {

			cell-id = <MSM_BUS_PNOC_SLV_6>;

			label = "pcnoc-s-6";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_blsp_1 &slv_tlmm_north>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_6>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_6>;

		};



		pcnoc_s_7: pcnoc-s-7 {

			cell-id = <MSM_BUS_PNOC_SLV_7>;

			label = "pcnoc-s-7";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_tlmm_south &slv_disp_ss_cfg

				&slv_sdcc_1 &slv_pcie &slv_sdcc_2>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_7>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_7>;

		};



		pcnoc_s_8: pcnoc-s-8 {

			cell-id = <MSM_BUS_PNOC_SLV_8>;

			label = "pcnoc-s-8";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_crypto_0_cfg>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_8>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_8>;

		};



		pcnoc_s_9: pcnoc-s-9 {

			cell-id = <MSM_BUS_PNOC_SLV_9>;

			label = "pcnoc-s-9";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_blsp_2

				&slv_tlmm_east &slv_pmic_arb>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_9>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_9>;

		};



		pcnoc_s_10: pcnoc-s-10 {

			cell-id = <MSM_BUS_PNOC_SLV_10>;

			label = "pcnoc-s-10";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_usb_hs>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_PCNOC_S_10>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_S_10>;

		};



		qdss_int: qdss-int {

			cell-id = <MSM_BUS_SNOC_QDSS_INT>;

			label = "qdss-int";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,connections = <&slv_snoc_bimc_1 &snoc_int_1>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_QDSS_INT>;

			qcom,slv-rpm-id = <ICBID_SLAVE_QDSS_INT>;

		};



		snoc_int_0: snoc-int-0 {

			cell-id = <MSM_BUS_SNOC_INT_0>;

			label = "snoc-int-0";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_lpass

				&slv_kpss_ahb &slv_wcss>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_SNOC_INT_0>;

			qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_INT_0>;

		};



		snoc_int_1: snoc-int-1 {

			cell-id = <MSM_BUS_SNOC_INT_1>;

			label = "snoc-int-1";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_snoc_pcnoc &snoc_int_2>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_SNOC_INT_1>;

			qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_INT_1>;

		};



		snoc_int_2: snoc-int-2 {

			cell-id = <MSM_BUS_SNOC_INT_2>;

			label = "snoc-int-2";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,connections = <&slv_qdss_stm &slv_imem>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,mas-rpm-id = <ICBID_MASTER_SNOC_INT_2>;

			qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_INT_2>;

		};



		/*Slaves*/

		slv_ebi:slv-ebi {

			cell-id = <MSM_BUS_SLAVE_EBI_CH0>;

			label = "slv-ebi";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_bimc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_EBI1>;

		};



		slv_bimc_snoc:slv-bimc-snoc {

			cell-id = <MSM_BUS_BIMC_SNOC_SLV>;

			label = "slv-bimc-snoc";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_bimc>;

			qcom,connections = <&mas_bimc_snoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_BIMC_SNOC>;

		};



		slv_spdm:slv-spdm {

			cell-id = <MSM_BUS_SLAVE_SPDM_WRAPPER>;

			label = "slv-spdm";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_SPDM_WRAPPER>;

		};



		slv_pdm:slv-pdm {

			cell-id = <MSM_BUS_SLAVE_PDM>;

			label = "slv-pdm";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PDM>;

		};



		slv_prng:slv-prng {

			cell-id = <MSM_BUS_SLAVE_PRNG>;

			label = "slv-prng";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PRNG>;

		};



		slv_tcsr:slv-tcsr {

			cell-id = <MSM_BUS_SLAVE_TCSR>;

			label = "slv-tcsr";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_TCSR>;

		};



		slv_snoc_cfg:slv-snoc-cfg {

			cell-id = <MSM_BUS_SLAVE_SNOC_CFG>;

			label = "slv-snoc-cfg";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_CFG>;

		};



		slv_message_ram:slv-message-ram {

			cell-id = <MSM_BUS_SLAVE_MESSAGE_RAM>;

			label = "slv-message-ram";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_MESSAGE_RAM>;

		};



		slv_disp_ss_cfg:slv-disp-ss-cfg {

			cell-id = <MSM_BUS_SLAVE_DISPLAY_CFG>;

			label = "slv-disp-ss-cfg";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_DISPLAY_CFG>;

		};



		slv_gpu_cfg:slv-gpu-cfg {

			cell-id = <MSM_BUS_SLAVE_GRAPHICS_3D_CFG>;

			label = "slv-gpu-cfg";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_GFX3D_CFG>;

		};



		slv_blsp_1:slv-blsp-1 {

			cell-id = <MSM_BUS_SLAVE_BLSP_1>;

			label = "slv-blsp-1";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_BLSP_1>;

		};



		slv_tlmm_north:slv-tlmm-north {

			cell-id = <MSM_BUS_SLAVE_TLMM_NORTH>;

			label = "slv-tlmm-north";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_TLMM_NORTH>;

		};



		slv_pcie:slv-pcie {

			cell-id = <MSM_BUS_SLAVE_PCIE_1>;

			label = "slv-pcie";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCIE_1>;

		};



		slv_blsp_2:slv-blsp-2 {

			cell-id = <MSM_BUS_SLAVE_BLSP_2>;

			label = "slv-blsp-2";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_BLSP_2>;

		};



		slv_tlmm_east:slv-tlmm-east {

			cell-id = <MSM_BUS_SLAVE_TLMM_EAST>;

			label = "slv-tlmm-east";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_TLMM_EAST>;

		};



		slv_tcu:slv-tcu {

			cell-id = <MSM_BUS_SLAVE_TCU>;

			label = "slv-tcu";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_TCU>;

		};



		slv_pmic_arb:slv-pmic-arb {

			cell-id = <MSM_BUS_SLAVE_PMIC_ARB>;

			label = "slv-pmic-arb";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PMIC_ARB>;

		};



		slv_sdcc_1:slv-sdcc-1 {

			cell-id = <MSM_BUS_SLAVE_SDCC_1>;

			label = "slv-sdcc-1";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_SDCC_1>;

		};



		slv_sdcc_2:slv-sdcc-2 {

			cell-id = <MSM_BUS_SLAVE_SDCC_2>;

			label = "slv-sdcc-2";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_SDCC_2>;

		};



		slv_tlmm_south:slv-tlmm-south {

			cell-id = <MSM_BUS_SLAVE_TLMM_SOUTH>;

			label = "slv-tlmm-south";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_TLMM_SOUTH>;

		};



		slv_usb_hs:slv-usb-hs {

			cell-id = <MSM_BUS_SLAVE_USB_HS>;

			label = "slv-usb-hs";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_USB_HS>;

		};



		slv_crypto_0_cfg:slv-crypto-0-cfg {

			cell-id = <MSM_BUS_SLAVE_CRYPTO_0_CFG>;

			label = "slv-crypto-0-cfg";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_CRYPTO_0_CFG>;

		};



		slv_pcnoc_snoc:slv-pcnoc-snoc {

			cell-id = <MSM_BUS_PNOC_SNOC_SLV>;

			label = "slv-pcnoc-snoc";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_pcnoc>;

			qcom,connections = <&mas_pcnoc_snoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_PCNOC_SNOC>;

		};



		slv_kpss_ahb:slv-kpss-ahb {

			cell-id = <MSM_BUS_SLAVE_APPSS>;

			label = "slv-kpss-ahb";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,bus-dev = <&fab_snoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_APPSS>;

		};



		slv_wcss:slv-wcss {

			cell-id = <MSM_BUS_SLAVE_WCSS>;

			label = "slv-wcss";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_WCSS>;

		};



		slv_snoc_bimc_1:slv-snoc-bimc-1 {

			cell-id = <MSM_BUS_SNOC_BIMC_1_SLV>;

			label = "slv-snoc-bimc-1";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,connections = <&mas_snoc_bimc_1>;

			qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_BIMC_1>;

		};



		slv_imem:slv-imem {

			cell-id = <MSM_BUS_SLAVE_OCIMEM>;

			label = "slv-imem";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_IMEM>;

		};



		slv_snoc_pcnoc:slv-snoc-pcnoc {

			cell-id = <MSM_BUS_SNOC_PNOC_SLV>;

			label = "slv-snoc-pcnoc";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,connections = <&mas_snoc_pcnoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_SNOC_PCNOC>;

		};



		slv_qdss_stm:slv-qdss-stm {

			cell-id = <MSM_BUS_SLAVE_QDSS_STM>;

			label = "slv-qdss-stm";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,bus-dev = <&fab_snoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_QDSS_STM>;

		};



		slv_cats_0:slv-cats-0 {

			cell-id = <MSM_BUS_SLAVE_CATS_128>;

			label = "slv-cats-0";

			qcom,buswidth = <16>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,bus-dev = <&fab_snoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_CATS_0>;

		};



		slv_cats_1:slv-cats-1 {

			cell-id = <MSM_BUS_SLAVE_OCMEM_64>;

			label = "slv-cats-1";

			qcom,buswidth = <8>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,bus-dev = <&fab_snoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_CATS_1>;

		};



		slv_lpass:slv-lpass {

			cell-id = <MSM_BUS_SLAVE_LPASS>;

			label = "slv-lpass";

			qcom,buswidth = <4>;

			qcom,agg-ports = <1>;

			qcom,ap-owned;

			qcom,bus-dev = <&fab_snoc>;

			qcom,slv-rpm-id = <ICBID_SLAVE_LPASS>;

		};

	};

};

arch/arm64/boot/dts/qcom/qcs405.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -746,6 +746,7 @@ 
#include "pms405-rpm-regulator.dtsi"

#include "qcs405-regulator.dtsi"

#include "qcs405-thermal.dtsi"

#include "qcs405-bus.dtsi"



&gdsc_mdss {

	status = "ok";