Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6c931e47 authored by Mayank Rana's avatar Mayank Rana
Browse files

dwc3: Add support to disable clock gating with USB controller



In some cases it is suggested to disable clock gating functionality of
USB controller. This change adds required support for same.

Change-Id: I6e99ce1f823f246153a26706e6209589e9142f67
Signed-off-by: default avatarMayank Rana <mrana@codeaurora.org>
parent c0c89b3b
Loading
Loading
Loading
Loading
+2 −0
Original line number Diff line number Diff line
@@ -64,6 +64,8 @@ Optional properties:
 - snps,bus-suspend-enable: If present then controller supports low power mode
	during bus suspend.
 - snps,usb3-u1u2-disable: If present, disable U1U2 low power modes in Superspeed mode
 - snps,disable-clk-gating: If present, disable controller's internal clock gating.
   Default it is enabled.

 - in addition all properties from usb-xhci.txt from the current directory are
   supported as well
+5 −0
Original line number Diff line number Diff line
@@ -724,6 +724,9 @@ static void dwc3_core_setup_global_control(struct dwc3 *dwc)
	if (dwc->revision < DWC3_REVISION_190A)
		reg |= DWC3_GCTL_U2RSTECN;

	if (dwc->disable_clk_gating)
		reg |= DWC3_GCTL_DSBLCLKGTNG;

	dwc3_writel(dwc->regs, DWC3_GCTL, reg);
}

@@ -1052,6 +1055,8 @@ static void dwc3_get_properties(struct dwc3 *dwc)
					"snps,bus-suspend-enable");
	dwc->usb3_u1u2_disable = device_property_read_bool(dev,
					"snps,usb3-u1u2-disable");
	dwc->disable_clk_gating = device_property_read_bool(dev,
					"snps,disable-clk-gating");

	dwc->lpm_nyet_threshold = lpm_nyet_threshold;
	dwc->tx_de_emphasis = tx_de_emphasis;
+1 −0
Original line number Diff line number Diff line
@@ -1125,6 +1125,7 @@ struct dwc3 {
	unsigned		ssp_u3_u0_quirk:1;
	unsigned		tx_de_emphasis:2;
	unsigned		err_evt_seen:1;
	unsigned		disable_clk_gating:1;
	unsigned		enable_bus_suspend:1;
	unsigned		usb3_u1u2_disable:1;