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Commit 6b9d5736 authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm/shd: add shared display support"

parents 2753b89d 5784022a
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QTI Snapdragon Display Engine (SDE) shared display

Required properties:
- compatible:		"qcom,shared-display"
- qcom,shared-display-base: node handle of qcom,shared-display-base, see below.
- qcom,blend-stage-range: A pair of u32 property <start size> defines the blend
			stage start and size for the shared display. For example
			<4 5> indicates this shared display's blending stage starts
			from 4 and there are 5 stages in total. Different shared
			display located on the same base display should not overlap
			with their blend stages. The maximum stages should be within
			the range of layer mixer hardware capability.
- qcom,shared-display-src-mode: source resolution of the shared display, which is also
			the framebuffer size. It contains two properties:
			qcom,mode-h-active: A u32 property defines horizontal resolution.
			qcom,mode-v-active: A u32 property defines vertical resolution.
- qcom,shared-display-dst-mode: destination rectangle in the shared display, which also
			includes the padding lines if line padding feature is enabled.
			It contains 4 properties:
			qcom,mode-x-offset: A u32 property of x offset.
			qcom,mode-y-offset: A u32 property of y offset.
			qcom,mode-width: A u32 property of width.
			qcom,mode-height: A u32 property of height, including line padding.


qcom,shared-display-base properties:
- qcom,shared-display-base-intf: A u32 property defines intf index of the base display.
- qcom,shared-display-base-mst: A u32 property defines the DP MST branch port, needed if
			the base display sits on DP MST display.
- qcom,shared-display-base-mode: timing of the physical base display, contains the
			following properties:
			qcom,mode-h-active: A u32 property defines the horizontal active size.
			qcom,mode-h-front-porch: A u32 property defines the horizontal front porch.
			qcom,mode-h-pulse-width: A u32 property defines the horizontal pulse.
			qcom,mode-h-back-porch: A u32 property defines the horizontal back porch.
			qcom,mode-h-active-high: A boolean property defines if horizontal polarity
						is high.
			qcom,mode-v-active: A u32 property defines the vertical active size.
			qcom,mode-v-front-porch: A u32 property defines the vertical front portch.
			qcom,mode-v-pulse-width: A u32 property defines the vertical pulse width.
			qcom,mode-v-back-porch: A u32 property defines the vertical back porch.
			qcom,mode-v-active-high: A boolean property defines if vertical polarity
						is high.
			qcom,mode-refresh-rate: A u32 property defines vertial refresh rate.
			qcom,mode-clock-in-khz: A u32 property defines clock in kHz.

Example:

/ {
	...

	sde_sh_base0: qcom,shared-display-base@0 {
		qcom,shared-display-base-intf = <0>;
		qcom,shared-display-base-mode {
			qcom,mode-h-active = <3840>;
			qcom,mode-h-front-porch = <176>;
			qcom,mode-h-pulse-width = <88>;
			qcom,mode-h-back-porch = <296>;
			qcom,mode-h-active-high;
			qcom,mode-v-active = <2160>;
			qcom,mode-v-front-porch = <8>;
			qcom,mode-v-pulse-width = <10>;
			qcom,mode-v-back-porch = <72>;
			qcom,mode-v-active-high;
			qcom,mode-refresh-rate = <30>;
			qcom,mode-clock-in-khz = <297000>;
		};
	};

	sde_sh0: qcom,shared-display@0 {
		compatible = "qcom,shared-display";
		qcom,shared-display-base = <&sde_sh_base0>;
		qcom,blend-stage-range = <0 5>;
		qcom,shared-display-src-mode {
			qcom,mode-h-active = <1920>;
			qcom,mode-v-active = <2160>;
		};
		qcom,shared-display-dst-mode {
			qcom,mode-x-offset = <0>;
			qcom,mode-y-offset = <0>;
			qcom,mode-width = <1920>;
			qcom,mode-height = <2160>;
		};
	};

	sde_sh1: qcom,shared-display@1 {
		compatible = "qcom,shared-display";
		qcom,shared-display-base = <&sde_sh_base0>;
		qcom,blend-stage-range = <5 5>;
		qcom,shared-display-src-mode {
			qcom,mode-h-active = <1920>;
			qcom,mode-v-active = <2160>;
		};
		qcom,shared-display-dst-mode {
			qcom,mode-x-offset = <1920>;
			qcom,mode-y-offset = <0>;
			qcom,mode-width = <1920>;
			qcom,mode-height = <2160>;
		};
	};
};
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@@ -152,6 +152,16 @@ config DRM_SDE_WB
	  the output image is written back to memory in the format
	  selected by the connector's mode and property settings.

config DRM_SDE_SHD
	bool "Enable Shared display support in SDE DRM"
	depends on DRM_MSM
	help
	  Choose this option for shared display support.
	  This option enables multiple logical displays
	  to share one base physical encoder/connector.
	  Each logical display will appear as different
	  connectors and report back to user.

config DRM_MSM_DSI_14NM_PHY
	bool "Enable DSI 14nm PHY driver in MSM DRM (used by MSM8996/APQ8096)"
	depends on DRM_MSM_DSI
+5 −0
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@@ -6,6 +6,7 @@ ccflags-$(CONFIG_DRM_MSM_DSI_PLL) += -Idrivers/gpu/drm/msm/dsi
ccflags-y += -Idrivers/gpu/drm/msm/sde
ccflags-y += -Idrivers/media/platform/msm/sde/rotator
ccflags-y += -Idrivers/gpu/drm/msm/hdmi
ccflags-$(CONFIG_DRM_SDE_SHD) += -Idrivers/gpu/drm/msm/shd

msm_drm-y := \
	dp/dp_usbpd.o \
@@ -186,6 +187,10 @@ msm_drm-$(CONFIG_DRM_MSM) += \
msm_drm-$(CONFIG_DRM_SDE_WB) += sde/sde_wb.o \
	sde/sde_encoder_phys_wb.o

msm_drm-$(CONFIG_DRM_SDE_SHD) += shd/shd_drm.o \
	shd/shd_hw.o \
	shd/sde_encoder_phys_shd.o

msm_drm-$(CONFIG_DRM_MSM) += \
	msm_atomic.o \
	msm_drv.o \
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/*
 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
 * Copyright (C) 2013 Red Hat
 * Author: Rob Clark <robdclark@gmail.com>
 *
@@ -65,11 +65,11 @@ struct msm_gem_address_space;
struct msm_gem_vma;

#define NUM_DOMAINS    4    /* one for KMS, then one per gpu core (?) */
#define MAX_CRTCS      8
#define MAX_CRTCS      16
#define MAX_PLANES     20
#define MAX_ENCODERS   8
#define MAX_BRIDGES    8
#define MAX_CONNECTORS 8
#define MAX_ENCODERS   16
#define MAX_BRIDGES    16
#define MAX_CONNECTORS 16

#define TEARDOWN_DEADLOCK_RETRY_MAX 5

+3 −1
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/*
 * Copyright (c) 2015-2018 The Linux Foundation. All rights reserved.
 * Copyright (c) 2015-2019 The Linux Foundation. All rights reserved.
 * Copyright (C) 2013 Red Hat
 * Author: Rob Clark <robdclark@gmail.com>
 *
@@ -186,6 +186,7 @@ struct sde_crtc_fps_info {
 * @output_fence  : output release fence context
 * @stage_cfg     : H/w mixer stage configuration
 * @debugfs_root  : Parent of debugfs node
 * @priv_handle   : Pointer to external private handle, if present
 * @vblank_cb_count : count of vblank callback since last reset
 * @play_count    : frame count between crtc enable and disable
 * @vblank_cb_time  : ktime at vblank count reset
@@ -249,6 +250,7 @@ struct sde_crtc {

	struct sde_hw_stage_cfg stage_cfg;
	struct dentry *debugfs_root;
	void *priv_handle;

	u32 vblank_cb_count;
	u64 play_count;
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