Loading arch/arm64/boot/dts/qcom/sdmmagpie-npu.dtsi +4 −3 Original line number Diff line number Diff line Loading @@ -13,8 +13,9 @@ &soc { msm_npu: qcom,msm_npu@9800000 { compatible = "qcom,msm-npu"; reg = <0x9800000 0x800000>; reg-names = "npu_base"; reg = <0x9800000 0x800000>, <0x780000 0x7000>; reg-names = "npu_base", "qfprom_physical"; interrupts = <GIC_SPI 583 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 585 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 587 IRQ_TYPE_EDGE_RISING>; Loading Loading @@ -65,8 +66,8 @@ qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; mboxes = <&qmp_npu0 0>, <&qmp_npu1 0>; mbox-names = "npu_low", "npu_high"; #cooling-cells = <2>; qcom,npubw-dev = <&npu_npu_ddr_bw>; qcom,npu-pwrlevels { #address-cells = <1>; #size-cells = <0>; Loading Loading
arch/arm64/boot/dts/qcom/sdmmagpie-npu.dtsi +4 −3 Original line number Diff line number Diff line Loading @@ -13,8 +13,9 @@ &soc { msm_npu: qcom,msm_npu@9800000 { compatible = "qcom,msm-npu"; reg = <0x9800000 0x800000>; reg-names = "npu_base"; reg = <0x9800000 0x800000>, <0x780000 0x7000>; reg-names = "npu_base", "qfprom_physical"; interrupts = <GIC_SPI 583 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 585 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 587 IRQ_TYPE_EDGE_RISING>; Loading Loading @@ -65,8 +66,8 @@ qcom,vdd_cx-uV-uA = <RPMH_REGULATOR_LEVEL_TURBO 100000>; mboxes = <&qmp_npu0 0>, <&qmp_npu1 0>; mbox-names = "npu_low", "npu_high"; #cooling-cells = <2>; qcom,npubw-dev = <&npu_npu_ddr_bw>; qcom,npu-pwrlevels { #address-cells = <1>; #size-cells = <0>; Loading