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Commit 6ac1571b authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Thierry Reding
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drm/tegra: dc: Avoid reset asserts on Tegra20



Commit 33a8eb8d ("drm/tegra: dc: Implement runtime PM") introduced
HW reset control. It causes a hang on Tegra20 if both display
controllers are utilized (RGB panel and HDMI). The TRM suggests that
each display controller has its own reset control, apparently it is not
correct.

Fixes: 33a8eb8d ("drm/tegra: dc: Implement runtime PM")
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Reviewed-by: default avatarErik Faye-Lund <kusmabite@gmail.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent e0b2ce02
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+21 −9
Original line number Diff line number Diff line
@@ -30,6 +30,7 @@ struct tegra_dc_soc_info {
	bool supports_block_linear;
	unsigned int pitch_align;
	bool has_powergate;
	bool broken_reset;
};

struct tegra_plane {
@@ -1856,6 +1857,7 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info = {
	.supports_block_linear = false,
	.pitch_align = 8,
	.has_powergate = false,
	.broken_reset = true,
};

static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
@@ -1865,6 +1867,7 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
	.supports_block_linear = false,
	.pitch_align = 8,
	.has_powergate = false,
	.broken_reset = false,
};

static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
@@ -1874,6 +1877,7 @@ static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
	.supports_block_linear = false,
	.pitch_align = 64,
	.has_powergate = true,
	.broken_reset = false,
};

static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
@@ -1883,6 +1887,7 @@ static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
	.supports_block_linear = true,
	.pitch_align = 64,
	.has_powergate = true,
	.broken_reset = false,
};

static const struct tegra_dc_soc_info tegra210_dc_soc_info = {
@@ -1892,6 +1897,7 @@ static const struct tegra_dc_soc_info tegra210_dc_soc_info = {
	.supports_block_linear = true,
	.pitch_align = 64,
	.has_powergate = true,
	.broken_reset = false,
};

static const struct of_device_id tegra_dc_of_match[] = {
@@ -1989,6 +1995,7 @@ static int tegra_dc_probe(struct platform_device *pdev)
		return PTR_ERR(dc->rst);
	}

	if (!dc->soc->broken_reset)
		reset_control_assert(dc->rst);

	if (dc->soc->has_powergate) {
@@ -2063,11 +2070,13 @@ static int tegra_dc_suspend(struct device *dev)
	struct tegra_dc *dc = dev_get_drvdata(dev);
	int err;

	if (!dc->soc->broken_reset) {
		err = reset_control_assert(dc->rst);
		if (err < 0) {
			dev_err(dev, "failed to assert reset: %d\n", err);
			return err;
		}
	}

	if (dc->soc->has_powergate)
		tegra_powergate_power_off(dc->powergate);
@@ -2096,12 +2105,15 @@ static int tegra_dc_resume(struct device *dev)
			return err;
		}

		if (!dc->soc->broken_reset) {
			err = reset_control_deassert(dc->rst);
			if (err < 0) {
			dev_err(dev, "failed to deassert reset: %d\n", err);
				dev_err(dev,
					"failed to deassert reset: %d\n", err);
				return err;
			}
		}
	}

	return 0;
}