Loading Documentation/devicetree/bindings/display/msm/dsi.txt +0 −2 Original line number Diff line number Diff line Loading @@ -127,7 +127,6 @@ Optional properties: turns off PHY pmic power supply, phy ldo and DSI Lane ldo during idle screen (footswitch control off) when this property is enabled. - qcom,dsi-phy-regulator-min-datarate-bps: Minimum per lane data rate (bps) to turn on PHY regulator. - qcom,panel-force-clock-lane-hs: A boolean property indicates that panel needs clock lanes in HS mode only [1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/graph.txt Loading Loading @@ -238,5 +237,4 @@ Example: qcom,dsi-phy-regulator-ldo-mode; qcom,panel-allow-phy-poweroff; qcom,dsi-phy-regulator-min-datarate-bps = <1200000000>; qcom,panel-force-clock-lane-hs; }; drivers/gpu/drm/msm/dsi-staging/dsi_defs.h +0 −1 Original line number Diff line number Diff line Loading @@ -475,7 +475,6 @@ struct dsi_video_engine_cfg { bool hsa_lp11_en; bool eof_bllp_lp11_en; bool bllp_lp11_en; bool force_clk_lane_hs; enum dsi_video_traffic_mode traffic_mode; u32 vc_id; u32 dma_sched_line; Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +8 −0 Original line number Diff line number Diff line Loading @@ -3550,6 +3550,14 @@ static int dsi_display_res_init(struct dsi_display *display) display->parser_node, display->display_type, display->cmdline_topology); display_for_each_ctrl(i, display) { struct msm_dsi_phy *phy = display->ctrl[i].phy; phy->cfg.force_clk_lane_hs = display->panel->host_config.force_hs_clk_lane; } if (IS_ERR_OR_NULL(display->panel)) { rc = PTR_ERR(display->panel); pr_err("failed to get panel, rc=%d\n", rc); Loading drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +0 −3 Original line number Diff line number Diff line Loading @@ -1270,9 +1270,6 @@ static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg, cfg->bllp_lp11_en = utils->read_bool(utils->data, "qcom,mdss-dsi-bllp-power-mode"); cfg->force_clk_lane_hs = of_property_read_bool(utils->data, "qcom,mdss-dsi-force-clock-lane-hs"); traffic_mode = utils->get_property(utils->data, "qcom,mdss-dsi-traffic-mode", NULL); Loading drivers/gpu/drm/msm/dsi-staging/dsi_phy.c +0 −3 Original line number Diff line number Diff line Loading @@ -323,9 +323,6 @@ static int dsi_phy_settings_init(struct platform_device *pdev, "qcom,dsi-phy-regulator-min-datarate-bps", &phy->regulator_min_datarate_bps); phy->cfg.force_clk_lane_hs = of_property_read_bool(pdev->dev.of_node, "qcom,panel-force-clock-lane-hs"); return 0; err: lane->count_per_lane = 0; Loading Loading
Documentation/devicetree/bindings/display/msm/dsi.txt +0 −2 Original line number Diff line number Diff line Loading @@ -127,7 +127,6 @@ Optional properties: turns off PHY pmic power supply, phy ldo and DSI Lane ldo during idle screen (footswitch control off) when this property is enabled. - qcom,dsi-phy-regulator-min-datarate-bps: Minimum per lane data rate (bps) to turn on PHY regulator. - qcom,panel-force-clock-lane-hs: A boolean property indicates that panel needs clock lanes in HS mode only [1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/graph.txt Loading Loading @@ -238,5 +237,4 @@ Example: qcom,dsi-phy-regulator-ldo-mode; qcom,panel-allow-phy-poweroff; qcom,dsi-phy-regulator-min-datarate-bps = <1200000000>; qcom,panel-force-clock-lane-hs; };
drivers/gpu/drm/msm/dsi-staging/dsi_defs.h +0 −1 Original line number Diff line number Diff line Loading @@ -475,7 +475,6 @@ struct dsi_video_engine_cfg { bool hsa_lp11_en; bool eof_bllp_lp11_en; bool bllp_lp11_en; bool force_clk_lane_hs; enum dsi_video_traffic_mode traffic_mode; u32 vc_id; u32 dma_sched_line; Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +8 −0 Original line number Diff line number Diff line Loading @@ -3550,6 +3550,14 @@ static int dsi_display_res_init(struct dsi_display *display) display->parser_node, display->display_type, display->cmdline_topology); display_for_each_ctrl(i, display) { struct msm_dsi_phy *phy = display->ctrl[i].phy; phy->cfg.force_clk_lane_hs = display->panel->host_config.force_hs_clk_lane; } if (IS_ERR_OR_NULL(display->panel)) { rc = PTR_ERR(display->panel); pr_err("failed to get panel, rc=%d\n", rc); Loading
drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +0 −3 Original line number Diff line number Diff line Loading @@ -1270,9 +1270,6 @@ static int dsi_panel_parse_video_host_config(struct dsi_video_engine_cfg *cfg, cfg->bllp_lp11_en = utils->read_bool(utils->data, "qcom,mdss-dsi-bllp-power-mode"); cfg->force_clk_lane_hs = of_property_read_bool(utils->data, "qcom,mdss-dsi-force-clock-lane-hs"); traffic_mode = utils->get_property(utils->data, "qcom,mdss-dsi-traffic-mode", NULL); Loading
drivers/gpu/drm/msm/dsi-staging/dsi_phy.c +0 −3 Original line number Diff line number Diff line Loading @@ -323,9 +323,6 @@ static int dsi_phy_settings_init(struct platform_device *pdev, "qcom,dsi-phy-regulator-min-datarate-bps", &phy->regulator_min_datarate_bps); phy->cfg.force_clk_lane_hs = of_property_read_bool(pdev->dev.of_node, "qcom,panel-force-clock-lane-hs"); return 0; err: lane->count_per_lane = 0; Loading