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Commit 69e26841 authored by Pradeep P V K's avatar Pradeep P V K
Browse files

ARM: dts: msm: Add QPIC support for qcs405 



Add QPIC NAND controller support for qcs405.

Change-Id: Iaca778331816069fab01cb4b68c56ba5bbb17c82
Signed-off-by: default avatarPradeep P V K <ppvk@codeaurora.org>
parent cefdcce2

arch/arm64/boot/dts/qcom/qcs405-cdp.dts

+4 −0
Original line number Diff line number Diff line
@@ -21,3 +21,7 @@ 
	compatible = "qcom,qcs405-cdp", "qcom,qcs405", "qcom,cdp";

	qcom,board-id = <1 0>;

};



&qnand_1 {

	status = "ok";

};

arch/arm64/boot/dts/qcom/qcs405-mtp.dts

+4 −0
Original line number Diff line number Diff line
@@ -21,3 +21,7 @@ 
	compatible = "qcom,qcs405-mtp", "qcom,qcs405", "qcom,mtp";

	qcom,board-id = <8 0>;

};



&qnand_1 {

	status = "ok";

};

arch/arm64/boot/dts/qcom/qcs405-rumi.dts

+4 −0
Original line number Diff line number Diff line
@@ -21,3 +21,7 @@ 
	compatible = "qcom,qcs405-rumi", "qcom,qcs405", "qcom,rumi";

	qcom,board-id = <15 0>;

};



&qnand_1 {

	status = "ok";

};

arch/arm64/boot/dts/qcom/qcs405.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -104,6 +104,7 @@ 
	aliases {

		sdhc1 = &sdhc_1; /* SDC1 eMMC slot */

		sdhc2 = &sdhc_2; /* SDC2 SD Card slot */

		qpic_nand1 = &qnand_1;

	};



	soc: soc { };
@@ -733,6 +734,21 @@ 


		status = "disabled";

	};



	qnand_1: nand@4c0000 {

		compatible = "qcom,msm-nand";

		reg = <0x004c0000 0x1000>,

		      <0x004c4000 0x1a000>;

		reg-names = "nand_phys",

			    "bam_phys";

		qcom,reg-adjustment-offset = <0x4000>;

		qcom,qpic-clk-rpmh;



		interrupts = <0 49 0>;

		interrupt-names = "bam_irq";



		status = "disabled";

	};

};



#include "qcs405-gdsc.dtsi"