Loading arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -1782,14 +1782,22 @@ }; &mvsc_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; status = "ok"; }; &mvs0_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; &mvs1_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; Loading drivers/clk/qcom/videocc-sdmmagpie.c +0 −4 Original line number Diff line number Diff line Loading @@ -158,10 +158,6 @@ static struct clk_rcg2 video_cc_xo_clk_src = { .parent_names = video_cc_parent_names_2, .num_parents = 2, .ops = &clk_rcg2_ops, .vdd_class = &vdd_cx, .num_rate_max = VDD_NUM, .rate_max = (unsigned long[VDD_NUM]) { [VDD_LOWER] = 19200000}, }, }; Loading Loading
arch/arm64/boot/dts/qcom/sdmmagpie.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -1782,14 +1782,22 @@ }; &mvsc_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; status = "ok"; }; &mvs0_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; &mvs1_gdsc { clock-names = "ahb_clk"; clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; qcom,support-hw-trigger; status = "ok"; }; Loading
drivers/clk/qcom/videocc-sdmmagpie.c +0 −4 Original line number Diff line number Diff line Loading @@ -158,10 +158,6 @@ static struct clk_rcg2 video_cc_xo_clk_src = { .parent_names = video_cc_parent_names_2, .num_parents = 2, .ops = &clk_rcg2_ops, .vdd_class = &vdd_cx, .num_rate_max = VDD_NUM, .rate_max = (unsigned long[VDD_NUM]) { [VDD_LOWER] = 19200000}, }, }; Loading