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Commit 678421c6 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "drm/msm/sde: add rev check for atoll target" into dev/msm-4.14-display

parents 8e6512a8 60ac557f

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+25 −5
Original line number Diff line number Diff line
@@ -1837,8 +1837,9 @@ static int sde_intf_parse_dt(struct device_node *np, 
		if (IS_SDE_CTL_REV_100(sde_cfg->ctl_rev))

			set_bit(SDE_INTF_INPUT_CTRL, &intf->features);



		if (IS_SDE_MAJOR_SAME((sde_cfg->hwversion),

				SDE_HW_VER_500))

		if (IS_SDE_MAJOR_SAME((sde_cfg->hwversion), SDE_HW_VER_500) ||

			(IS_SDE_MAJOR_MINOR_SAME((sde_cfg->hwversion),

					SDE_HW_VER_620)))

			set_bit(SDE_INTF_TE, &intf->features);

	}
@@ -3595,7 +3596,8 @@ static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, 
	virt_vig_list_size += ARRAY_SIZE(rgb_10bit_formats);

	if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400) ||

		(IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_410)) ||

		(IS_SDE_MAJOR_SAME((hw_rev), SDE_HW_VER_500)))

		(IS_SDE_MAJOR_SAME((hw_rev), SDE_HW_VER_500)) ||

		(IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_620)))

		vig_list_size += ARRAY_SIZE(p010_ubwc_formats);



	wb2_list_size += ARRAY_SIZE(rgb_10bit_formats)
@@ -3633,7 +3635,8 @@ static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, 
	if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_300) ||

	    IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400) ||

	    IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_410) ||

	    IS_SDE_MAJOR_SAME((hw_rev), SDE_HW_VER_500))

	    IS_SDE_MAJOR_SAME((hw_rev), SDE_HW_VER_500) ||

		IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_620))

		sde_cfg->has_hdr = true;



	/* Disable HDR for SM6150 target only */
@@ -3656,7 +3659,8 @@ static int sde_hardware_format_caps(struct sde_mdss_cfg *sde_cfg, 
		index, p010_formats, ARRAY_SIZE(p010_formats));

	if (IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_400) ||

		(IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_410)) ||

		(IS_SDE_MAJOR_SAME((hw_rev), SDE_HW_VER_500)))

		(IS_SDE_MAJOR_SAME((hw_rev), SDE_HW_VER_500)) ||

		(IS_SDE_MAJOR_MINOR_SAME((hw_rev), SDE_HW_VER_620)))

		index += sde_copy_formats(sde_cfg->vig_formats,

			vig_list_size, index, p010_ubwc_formats,

			ARRAY_SIZE(p010_ubwc_formats));
@@ -3787,6 +3791,22 @@ static int _sde_hardware_pre_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev) 
		sde_cfg->has_sui_blendstage = true;

		sde_cfg->has_qos_fl_nocalc = true;

		sde_cfg->has_decimation = true;

	} else if (IS_ATOLL_TARGET(hw_rev)) {

		sde_cfg->has_cwb_support = true;

		sde_cfg->has_qsync = true;

		sde_cfg->perf.min_prefill_lines = 24;

		sde_cfg->vbif_qos_nlvl = 8;

		sde_cfg->ts_prefill_rev = 2;

		sde_cfg->ctl_rev = SDE_CTL_CFG_VERSION_1_0_0;

		sde_cfg->delay_prg_fetch_start = true;

		sde_cfg->sui_ns_allowed = true;

		sde_cfg->sui_misr_supported = true;

		sde_cfg->sui_block_xin_mask = 0x261;

		sde_cfg->has_sui_blendstage = true;

		sde_cfg->has_qos_fl_nocalc = true;

		sde_cfg->has_3d_merge_reset = true;

		clear_bit(MDSS_INTR_AD4_0_INTR, sde_cfg->mdss_irqs);

		clear_bit(MDSS_INTR_AD4_1_INTR, sde_cfg->mdss_irqs);

	} else {

		SDE_ERROR("unsupported chipset id:%X\n", hw_rev);

		sde_cfg->perf.min_prefill_lines = 0xffff;

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+2 −0
Original line number Diff line number Diff line
@@ -56,6 +56,7 @@ 
#define SDE_HW_VER_520	SDE_HW_VER(5, 2, 0) /* sdmmagpie v1.0 */

#define SDE_HW_VER_530	SDE_HW_VER(5, 3, 0) /* sm6150 v1.0 */

#define SDE_HW_VER_540	SDE_HW_VER(5, 4, 0) /* sdmtrinket v1.0 */

#define SDE_HW_VER_620	SDE_HW_VER(6, 2, 0) /* atoll*/



#define IS_MSM8996_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_170)

#define IS_MSM8998_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_300)
@@ -66,6 +67,7 @@ 
#define IS_SDMMAGPIE_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_520)

#define IS_SM6150_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_530)

#define IS_SDMTRINKET_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_540)

#define IS_ATOLL_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_620)



#define SDE_HW_BLK_NAME_LEN	16

drivers/gpu/drm/msm/sde/sde_hw_lm.c

+2 −1
Original line number Diff line number Diff line
@@ -267,7 +267,8 @@ static void _setup_mixer_ops(struct sde_mdss_cfg *m, 
			IS_SDMSHRIKE_TARGET(m->hwversion) ||

			IS_SM6150_TARGET(m->hwversion) ||

			IS_SDMMAGPIE_TARGET(m->hwversion) ||

			IS_SDMTRINKET_TARGET(m->hwversion))

			IS_SDMTRINKET_TARGET(m->hwversion) ||

			IS_ATOLL_TARGET(m->hwversion))

		ops->setup_blend_config = sde_hw_lm_setup_blend_config_sdm845;

	else

		ops->setup_blend_config = sde_hw_lm_setup_blend_config;

drivers/gpu/drm/msm/sde/sde_hw_vbif.c

+2 −1
Original line number Diff line number Diff line
@@ -243,7 +243,8 @@ static void _setup_vbif_ops(const struct sde_mdss_cfg *m, 
		ops->set_qos_remap = sde_hw_set_qos_remap;

	if (IS_SM8150_TARGET(m->hwversion) || IS_SM6150_TARGET(m->hwversion) ||

			IS_SDMMAGPIE_TARGET(m->hwversion) ||

			IS_SDMTRINKET_TARGET(m->hwversion))

			IS_SDMTRINKET_TARGET(m->hwversion) ||

			IS_ATOLL_TARGET(m->hwversion))

		ops->set_mem_type = sde_hw_set_mem_type_v1;

	else

		ops->set_mem_type = sde_hw_set_mem_type;

drivers/gpu/drm/msm/sde_dbg.c

+2 −1
Original line number Diff line number Diff line
@@ -5143,7 +5143,8 @@ void sde_dbg_init_dbg_buses(u32 hwversion) 
		dbg->dbgbus_dsi.size = ARRAY_SIZE(dsi_dbg_bus_sdm845);

	} else if (IS_SM8150_TARGET(hwversion) || IS_SM6150_TARGET(hwversion) ||

				IS_SDMMAGPIE_TARGET(hwversion) ||

				IS_SDMTRINKET_TARGET(hwversion)) {

				IS_SDMTRINKET_TARGET(hwversion) ||

				IS_ATOLL_TARGET(hwversion)) {

		dbg->dbgbus_sde.entries = dbg_bus_sde_sm8150;

		dbg->dbgbus_sde.cmn.entries_size =

				ARRAY_SIZE(dbg_bus_sde_sm8150);