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Commit 6761dd31 authored by Tvrtko Ursulin's avatar Tvrtko Ursulin Committed by Daniel Vetter
Browse files

drm/i915/skl: Extract tile height code into a helper function 



It will be used in a later patch and also convert all height parameters
from int to unsigned int.

v2: Rebased for fb modifiers.
v3: Fixed v2 rebase.
v4:
   * Height should be unsigned int.
   * Make it take pixel_format for consistency and simplicity.

Signed-off-by: default avatarTvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Michel Thierry <michel.thierry@intel.com> (v1)
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> (v4)
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 9848de08

drivers/gpu/drm/i915/intel_display.c

+25 −18
Original line number Diff line number Diff line
@@ -2233,13 +2233,12 @@ static bool need_vtd_wa(struct drm_device *dev) 
	return false;

}



int

intel_fb_align_height(struct drm_device *dev, int height,

		      uint32_t pixel_format,

static unsigned int

intel_tile_height(struct drm_device *dev, uint32_t pixel_format,

		  uint64_t fb_format_modifier)

{

	int tile_height;

	uint32_t bits_per_pixel;

	unsigned int tile_height;

	uint32_t pixel_bytes;



	switch (fb_format_modifier) {

	case DRM_FORMAT_MOD_NONE:
@@ -2252,20 +2251,20 @@ intel_fb_align_height(struct drm_device *dev, int height, 
		tile_height = 32;

		break;

	case I915_FORMAT_MOD_Yf_TILED:

		bits_per_pixel = drm_format_plane_cpp(pixel_format, 0) * 8;

		switch (bits_per_pixel) {

		pixel_bytes = drm_format_plane_cpp(pixel_format, 0);

		switch (pixel_bytes) {

		default:

		case 8:

		case 1:

			tile_height = 64;

			break;

		case 16:

		case 32:

		case 2:

		case 4:

			tile_height = 32;

			break;

		case 64:

		case 8:

			tile_height = 16;

			break;

		case 128:

		case 16:

			WARN_ONCE(1,

				  "128-bit pixels are not supported for display!");

			tile_height = 16;
@@ -2278,7 +2277,15 @@ intel_fb_align_height(struct drm_device *dev, int height, 
		break;

	}



	return ALIGN(height, tile_height);

	return tile_height;

}



unsigned int

intel_fb_align_height(struct drm_device *dev, unsigned int height,

		      uint32_t pixel_format, uint64_t fb_format_modifier)

{

	return ALIGN(height, intel_tile_height(dev, pixel_format,

					       fb_format_modifier));

}



int
@@ -6811,7 +6818,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc, 
	u32 val, base, offset;

	int pipe = crtc->pipe, plane = crtc->plane;

	int fourcc, pixel_format;

	int aligned_height;

	unsigned int aligned_height;

	struct drm_framebuffer *fb;

	struct intel_framebuffer *intel_fb;
@@ -7849,7 +7856,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc, 
	u32 val, base, offset, stride_mult, tiling;

	int pipe = crtc->pipe;

	int fourcc, pixel_format;

	int aligned_height;

	unsigned int aligned_height;

	struct drm_framebuffer *fb;

	struct intel_framebuffer *intel_fb;
@@ -7957,7 +7964,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc, 
	u32 val, base, offset;

	int pipe = crtc->pipe;

	int fourcc, pixel_format;

	int aligned_height;

	unsigned int aligned_height;

	struct drm_framebuffer *fb;

	struct intel_framebuffer *intel_fb;
@@ -12883,7 +12890,7 @@ static int intel_framebuffer_init(struct drm_device *dev, 
				  struct drm_mode_fb_cmd2 *mode_cmd,

				  struct drm_i915_gem_object *obj)

{

	int aligned_height;

	unsigned int aligned_height;

	int ret;

	u32 pitch_limit, stride_alignment;

drivers/gpu/drm/i915/intel_drv.h

+4 −3
Original line number Diff line number Diff line
@@ -901,7 +901,8 @@ void intel_frontbuffer_flip(struct drm_device *dev, 
	intel_frontbuffer_flush(dev, frontbuffer_bits);

}



int intel_fb_align_height(struct drm_device *dev, int height,

unsigned int intel_fb_align_height(struct drm_device *dev,

				   unsigned int height,

				   uint32_t pixel_format,

				   uint64_t fb_format_modifier);

void intel_fb_obj_flush(struct drm_i915_gem_object *obj, bool retire);