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Commit 66711e66 authored by Matt Carlson's avatar Matt Carlson Committed by David S. Miller
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tg3: Create aliases for rx producer mailbox regs 



The rx producer mailbox registers are used in several spots in the code.
The addition of TG3_64BIT_REG_LOW makes register references
uncomfortably long.  This patch creates an alias for the standard and
jumbo ring producer index registers to make the code cleaner.

Signed-off-by: default avatarMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 2b2cdb65

drivers/net/tg3.c

+6 −12
Original line number Diff line number Diff line
@@ -402,7 +402,7 @@ static void tg3_write_indirect_mbox(struct tg3 *tp, u32 off, u32 val) 
				       TG3_64BIT_REG_LOW, val);

		return;

	}

	if (off == (MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW)) {

	if (off == TG3_RX_STD_PROD_IDX_REG) {

		pci_write_config_dword(tp->pdev, TG3PCI_STD_RING_PROD_IDX +

				       TG3_64BIT_REG_LOW, val);

		return;
@@ -4684,9 +4684,7 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget) 


		if (unlikely(rx_std_posted >= tp->rx_std_max_post)) {

			u32 idx = *post_ptr % TG3_RX_RING_SIZE;



			tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX +

				     TG3_64BIT_REG_LOW, idx);

			tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, idx);

			work_mask &= ~RXD_OPAQUE_RING_STD;

			rx_std_posted = 0;

		}
@@ -4708,13 +4706,11 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget) 
	/* Refill RX ring(s). */

	if (work_mask & RXD_OPAQUE_RING_STD) {

		tpr->rx_std_prod_idx = std_prod_idx % TG3_RX_RING_SIZE;

		tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW,

			     tpr->rx_std_prod_idx);

		tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, tpr->rx_std_prod_idx);

	}

	if (work_mask & RXD_OPAQUE_RING_JUMBO) {

		tpr->rx_jmb_prod_idx = jmb_prod_idx % TG3_RX_JUMBO_RING_SIZE;

		tw32_rx_mbox(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW,

			     tpr->rx_jmb_prod_idx);

		tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx);

	}

	mmiowb();
@@ -7526,13 +7522,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) 
	tw32(RCVDBDI_STD_BD + TG3_BDINFO_MAXLEN_FLAGS, val);



	tpr->rx_std_prod_idx = tp->rx_pending;

	tw32_rx_mbox(MAILBOX_RCV_STD_PROD_IDX + TG3_64BIT_REG_LOW,

		     tpr->rx_std_prod_idx);

	tw32_rx_mbox(TG3_RX_STD_PROD_IDX_REG, tpr->rx_std_prod_idx);



	tpr->rx_jmb_prod_idx = (tp->tg3_flags & TG3_FLAG_JUMBO_RING_ENABLE) ?

			  tp->rx_jumbo_pending : 0;

	tw32_rx_mbox(MAILBOX_RCV_JUMBO_PROD_IDX + TG3_64BIT_REG_LOW,

		     tpr->rx_jmb_prod_idx);

	tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx);



	if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {

		tw32(STD_REPLENISH_LWM, 32);

drivers/net/tg3.h

+4 −0
Original line number Diff line number Diff line
@@ -242,7 +242,11 @@ 
#define MAILBOX_GENERAL_7		0x00000258 /* 64-bit */

#define MAILBOX_RELOAD_STAT		0x00000260 /* 64-bit */

#define MAILBOX_RCV_STD_PROD_IDX	0x00000268 /* 64-bit */

#define TG3_RX_STD_PROD_IDX_REG		(MAILBOX_RCV_STD_PROD_IDX + \

					 TG3_64BIT_REG_LOW)

#define MAILBOX_RCV_JUMBO_PROD_IDX	0x00000270 /* 64-bit */

#define TG3_RX_JMB_PROD_IDX_REG		(MAILBOX_RCV_JUMBO_PROD_IDX + \

					 TG3_64BIT_REG_LOW)

#define MAILBOX_RCV_MINI_PROD_IDX	0x00000278 /* 64-bit */

#define MAILBOX_RCVRET_CON_IDX_0	0x00000280 /* 64-bit */

#define MAILBOX_RCVRET_CON_IDX_1	0x00000288 /* 64-bit */