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Commit 6657242b authored by Tony Truong's avatar Tony Truong Committed by Gerrit - the friendly Code Review server
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msm: msi: mask/unmask MSI when PCIe device enable/disable MSI 



There are 2 layers of IRQs for PCIe MSI: GIC and PCIe. When
device disables their MSI, GIC is still receiving the IRQ.
Update PCIe MSI controller to mask/unmask the source IRQ
whenever PCIe device enable/disable their MSI.

Change-Id: I3925bb2160049f1271e3ee9ef25d3a882b0a35a0
Signed-off-by: default avatarTony Truong <truong@codeaurora.org>
parent 92a10f31

drivers/pci/host/pci-msm-msi.c

+37 −3
Original line number Original line Diff line number Diff line 
/* Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.

/* Copyright (c) 2014-2019, The Linux Foundation. All rights reserved.

 *

 *

 * This program is free software; you can redistribute it and/or modify

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * it under the terms of the GNU General Public License version 2 and
@@ -123,10 +123,40 @@ static void msm_msi_qgic_handler(struct irq_desc *desc) 
	chained_irq_exit(chip, desc);

	chained_irq_exit(chip, desc);

}

}





static void msm_msi_mask_irq(struct irq_data *data)

{

	struct irq_data *parent_data;



	if (!data->parent_data)

		return;



	parent_data = irq_get_irq_data(data->parent_data->hwirq);

	if (!parent_data || !parent_data->chip)

		return;



	pci_msi_mask_irq(data);

	parent_data->chip->irq_mask(parent_data);

}



static void msm_msi_unmask_irq(struct irq_data *data)

{

	struct irq_data *parent_data;



	if (!data->parent_data)

		return;



	parent_data = irq_get_irq_data(data->parent_data->hwirq);

	if (!parent_data || !parent_data->chip)

		return;



	parent_data->chip->irq_unmask(parent_data);

	pci_msi_unmask_irq(data);

}



static struct irq_chip msm_msi_irq_chip = {

static struct irq_chip msm_msi_irq_chip = {

	.name = "msm_pci_msi",

	.name = "msm_pci_msi",

	.irq_mask = pci_msi_mask_irq,

	.irq_mask = msm_msi_mask_irq,

	.irq_unmask = pci_msi_unmask_irq,

	.irq_unmask = msm_msi_unmask_irq,

};

};





static int msm_msi_domain_prepare(struct irq_domain *domain, struct device *dev,

static int msm_msi_domain_prepare(struct irq_domain *domain, struct device *dev,
@@ -297,6 +327,10 @@ static int msm_msi_irq_domain_alloc(struct irq_domain *domain, 
				msi_irq->hwirq,

				msi_irq->hwirq,

				&msm_msi_bottom_irq_chip, msi_irq,

				&msm_msi_bottom_irq_chip, msi_irq,

				handle_simple_irq, NULL, NULL);

				handle_simple_irq, NULL, NULL);



		if (msi->type == MSM_MSI_TYPE_QCOM)

			irq_set_status_flags(msi_irq->virq, IRQ_DISABLE_UNLAZY);



		client->nr_irqs++;

		client->nr_irqs++;

		pos++;

		pos++;

	}

	}