Loading arch/arm64/boot/dts/qcom/sm8150-qrd.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -192,6 +192,30 @@ qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_sim_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_sim_vid { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_dual_sim_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_dual_sim_vid { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_sw43404_amoled_cmd_display { qcom,dsi-display-active; }; Loading drivers/gpu/drm/bridge/analogix-anx7625.c +1 −1 Original line number Diff line number Diff line Loading @@ -710,7 +710,7 @@ static int anx7625_poweron(struct anx7625 *anx7625) usleep_range(10000, 11000); gpiod_set_value_cansleep(pdata->gpiod_reset, 1); usleep_range(1000, 1100); usleep_range(10000, 11000); /* setup clock */ WriteReg(RX_P0, XTAL_FRQ_SEL, XTAL_FRQ_27M); Loading drivers/gpu/drm/msm/dp/dp_catalog.c +9 −1 Original line number Diff line number Diff line Loading @@ -858,6 +858,8 @@ static void dp_catalog_ctrl_lane_mapping(struct dp_catalog_ctrl *ctrl, { struct dp_catalog_private *catalog; struct dp_io_data *io_data; u8 l_map[4], i; u32 lane_map_reg = 0; if (!ctrl) { pr_err("invalid input\n"); Loading @@ -867,8 +869,14 @@ static void dp_catalog_ctrl_lane_mapping(struct dp_catalog_ctrl *ctrl, catalog = dp_catalog_get_priv(ctrl); io_data = catalog->io.dp_link; for (i = 0; i < DP_MAX_PHY_LN; i++) l_map[i] = lane_map[i]; lane_map_reg = ((l_map[3]&3)<<6)|((l_map[2]&3)<<4)|((l_map[1]&3)<<2) |(l_map[0]&3); dp_write(catalog->exe_mode, io_data, DP_LOGICAL2PHYSICAL_LANE_MAPPING, 0xe4); lane_map_reg); } static void dp_catalog_ctrl_lane_pnswap(struct dp_catalog_ctrl *ctrl, Loading drivers/gpu/drm/msm/dp/dp_display.c +12 −0 Original line number Diff line number Diff line Loading @@ -785,6 +785,8 @@ static int dp_display_process_hpd_high(struct dp_display_private *dp) dp->dp_display.max_pclk_khz = min(dp->parser->max_pclk_khz, dp->debug->max_pclk_khz); dp->dp_display.max_hdisplay = dp->parser->max_hdisplay; dp->dp_display.max_vdisplay = dp->parser->max_vdisplay; dp_display_host_init(dp); Loading Loading @@ -1973,6 +1975,16 @@ static enum drm_mode_status dp_display_validate_mode( goto end; } if (dp_display->max_hdisplay > 0 && dp_display->max_vdisplay > 0 && ((mode->hdisplay > dp_display->max_hdisplay) || (mode->vdisplay > dp_display->max_vdisplay))) { DP_MST_DEBUG("hdisplay:%d, max-hdisplay:%d", mode->hdisplay, dp_display->max_hdisplay); DP_MST_DEBUG(" vdisplay:%d, max-vdisplay:%d\n", mode->vdisplay, dp_display->max_vdisplay); goto end; } /* * If the connector exists in the mst connector list and if debug is * enabled for that connector, use the mst connector settings from the Loading drivers/gpu/drm/msm/dp/dp_display.h +2 −0 Original line number Diff line number Diff line Loading @@ -76,6 +76,8 @@ struct dp_display { bool is_sst_connected; bool is_mst_supported; u32 max_pclk_khz; u32 max_hdisplay; u32 max_vdisplay; void *dp_mst_prv_info; int (*enable)(struct dp_display *dp_display, void *panel); Loading Loading
arch/arm64/boot/dts/qcom/sm8150-qrd.dtsi +24 −0 Original line number Diff line number Diff line Loading @@ -192,6 +192,30 @@ qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_sim_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_sim_vid { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_dual_sim_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_dual_sim_vid { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,platform-reset-gpio = <&tlmm 6 0>; }; &dsi_sw43404_amoled_cmd_display { qcom,dsi-display-active; }; Loading
drivers/gpu/drm/bridge/analogix-anx7625.c +1 −1 Original line number Diff line number Diff line Loading @@ -710,7 +710,7 @@ static int anx7625_poweron(struct anx7625 *anx7625) usleep_range(10000, 11000); gpiod_set_value_cansleep(pdata->gpiod_reset, 1); usleep_range(1000, 1100); usleep_range(10000, 11000); /* setup clock */ WriteReg(RX_P0, XTAL_FRQ_SEL, XTAL_FRQ_27M); Loading
drivers/gpu/drm/msm/dp/dp_catalog.c +9 −1 Original line number Diff line number Diff line Loading @@ -858,6 +858,8 @@ static void dp_catalog_ctrl_lane_mapping(struct dp_catalog_ctrl *ctrl, { struct dp_catalog_private *catalog; struct dp_io_data *io_data; u8 l_map[4], i; u32 lane_map_reg = 0; if (!ctrl) { pr_err("invalid input\n"); Loading @@ -867,8 +869,14 @@ static void dp_catalog_ctrl_lane_mapping(struct dp_catalog_ctrl *ctrl, catalog = dp_catalog_get_priv(ctrl); io_data = catalog->io.dp_link; for (i = 0; i < DP_MAX_PHY_LN; i++) l_map[i] = lane_map[i]; lane_map_reg = ((l_map[3]&3)<<6)|((l_map[2]&3)<<4)|((l_map[1]&3)<<2) |(l_map[0]&3); dp_write(catalog->exe_mode, io_data, DP_LOGICAL2PHYSICAL_LANE_MAPPING, 0xe4); lane_map_reg); } static void dp_catalog_ctrl_lane_pnswap(struct dp_catalog_ctrl *ctrl, Loading
drivers/gpu/drm/msm/dp/dp_display.c +12 −0 Original line number Diff line number Diff line Loading @@ -785,6 +785,8 @@ static int dp_display_process_hpd_high(struct dp_display_private *dp) dp->dp_display.max_pclk_khz = min(dp->parser->max_pclk_khz, dp->debug->max_pclk_khz); dp->dp_display.max_hdisplay = dp->parser->max_hdisplay; dp->dp_display.max_vdisplay = dp->parser->max_vdisplay; dp_display_host_init(dp); Loading Loading @@ -1973,6 +1975,16 @@ static enum drm_mode_status dp_display_validate_mode( goto end; } if (dp_display->max_hdisplay > 0 && dp_display->max_vdisplay > 0 && ((mode->hdisplay > dp_display->max_hdisplay) || (mode->vdisplay > dp_display->max_vdisplay))) { DP_MST_DEBUG("hdisplay:%d, max-hdisplay:%d", mode->hdisplay, dp_display->max_hdisplay); DP_MST_DEBUG(" vdisplay:%d, max-vdisplay:%d\n", mode->vdisplay, dp_display->max_vdisplay); goto end; } /* * If the connector exists in the mst connector list and if debug is * enabled for that connector, use the mst connector settings from the Loading
drivers/gpu/drm/msm/dp/dp_display.h +2 −0 Original line number Diff line number Diff line Loading @@ -76,6 +76,8 @@ struct dp_display { bool is_sst_connected; bool is_mst_supported; u32 max_pclk_khz; u32 max_hdisplay; u32 max_vdisplay; void *dp_mst_prv_info; int (*enable)(struct dp_display *dp_display, void *panel); Loading