Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 650da34c authored by Zhiyuan Lv's avatar Zhiyuan Lv Committed by Daniel Vetter
Browse files

drm/i915: guest i915 notification for Intel GVT-g



When i915 drivers run inside a VM with Intel GVT-g, some explicit
notifications are needed from guest to host device model through PV
INFO page write. The notifications include:

	PPGTT create
	PPGTT destroy

They are used for the shadow implementation of PPGTT. Intel GVT-g
needs to write-protect the guest pages of PPGTT, and clear the write
protection when they end their life cycle.

v2:
- Use lower_32_bits()/upper_32_bits() for qword operations;
- Remove the notification of guest context creation/destroy;

Signed-off-by: default avatarZhiyuan Lv <zhiyuan.lv@intel.com>
Signed-off-by: default avatarZhi Wang <zhi.a.wang@intel.com>
Reviewed-by: default avatarJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 532beabf
Loading
Loading
Loading
Loading
+41 −0
Original line number Original line Diff line number Diff line
@@ -899,6 +899,41 @@ static int gen8_init_scratch(struct i915_address_space *vm)
	return 0;
	return 0;
}
}


static int gen8_ppgtt_notify_vgt(struct i915_hw_ppgtt *ppgtt, bool create)
{
	enum vgt_g2v_type msg;
	struct drm_device *dev = ppgtt->base.dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	unsigned int offset = vgtif_reg(pdp0_lo);
	int i;

	if (USES_FULL_48BIT_PPGTT(dev)) {
		u64 daddr = px_dma(&ppgtt->pml4);

		I915_WRITE(offset, lower_32_bits(daddr));
		I915_WRITE(offset + 4, upper_32_bits(daddr));

		msg = (create ? VGT_G2V_PPGTT_L4_PAGE_TABLE_CREATE :
				VGT_G2V_PPGTT_L4_PAGE_TABLE_DESTROY);
	} else {
		for (i = 0; i < GEN8_LEGACY_PDPES; i++) {
			u64 daddr = i915_page_dir_dma_addr(ppgtt, i);

			I915_WRITE(offset, lower_32_bits(daddr));
			I915_WRITE(offset + 4, upper_32_bits(daddr));

			offset += 8;
		}

		msg = (create ? VGT_G2V_PPGTT_L3_PAGE_TABLE_CREATE :
				VGT_G2V_PPGTT_L3_PAGE_TABLE_DESTROY);
	}

	I915_WRITE(vgtif_reg(g2v_notify), msg);

	return 0;
}

static void gen8_free_scratch(struct i915_address_space *vm)
static void gen8_free_scratch(struct i915_address_space *vm)
{
{
	struct drm_device *dev = vm->dev;
	struct drm_device *dev = vm->dev;
@@ -945,6 +980,9 @@ static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
	struct i915_hw_ppgtt *ppgtt =
	struct i915_hw_ppgtt *ppgtt =
		container_of(vm, struct i915_hw_ppgtt, base);
		container_of(vm, struct i915_hw_ppgtt, base);


	if (intel_vgpu_active(vm->dev))
		gen8_ppgtt_notify_vgt(ppgtt, false);

	if (!USES_FULL_48BIT_PPGTT(ppgtt->base.dev))
	if (!USES_FULL_48BIT_PPGTT(ppgtt->base.dev))
		gen8_ppgtt_cleanup_3lvl(ppgtt->base.dev, &ppgtt->pdp);
		gen8_ppgtt_cleanup_3lvl(ppgtt->base.dev, &ppgtt->pdp);
	else
	else
@@ -1519,6 +1557,9 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
		}
		}
	}
	}


	if (intel_vgpu_active(ppgtt->base.dev))
		gen8_ppgtt_notify_vgt(ppgtt, true);

	return 0;
	return 0;


free_scratch:
free_scratch: