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Commit 64b853aa authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev 

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev: (32 commits)
  [libata] sata_mv: print out additional chip info during probe
  [libata] Use ATA_UDMAx standard masks when filling driver's udma_mask info
  [libata] AHCI: Add support for Marvell AHCI-like chips (initially 6145)
  [libata] Clean up driver udma_mask initializers
  libata: Support chips with 64K PRD quirk
  Add a PCI ID for santa rosa's PATA controller.
  sata_sil24: sil24_interrupt() micro-optimisation
  Add irq_flags to struct pata_platform_info
  sata_promise: cleanups
  [libata] pata_ixp4xx: kill unused var
  ata_piix: fix pio/mwdma programming
  [libata] ahci: minor internal cleanups
  [ATA] Add named constant for ATAPI command DEVICE RESET
  [libata] sata_sx4, sata_via: minor documentation updates
  [libata] ahci: minor internal cleanups
  [libata] ahci: Factor out SATA port init into a separate function
  [libata] pata_sil680: minor cleanups from benh
  [libata] sata_sx4: named constant cleanup
  [libata] pata_ixp4xx: convert to new EH
  [libata] pdc_adma: Reorder initializers with a couple structs
  ...
parents 0f166396 c1e4fe71

drivers/ata/ahci.c

+111 −48
Original line number Diff line number Diff line
@@ -46,7 +46,7 @@ 
#include <linux/libata.h>



#define DRV_NAME	"ahci"

#define DRV_VERSION	"2.2"

#define DRV_VERSION	"2.3"





enum {
@@ -54,7 +54,7 @@ enum { 
	AHCI_MAX_PORTS		= 32,

	AHCI_MAX_SG		= 168, /* hardware max is 64K */

	AHCI_DMA_BOUNDARY	= 0xffffffff,

	AHCI_USE_CLUSTERING	= 0,

	AHCI_USE_CLUSTERING	= 1,

	AHCI_MAX_CMDS		= 32,

	AHCI_CMD_SZ		= 32,

	AHCI_CMD_SLOT_SZ	= AHCI_MAX_CMDS * AHCI_CMD_SZ,
@@ -81,6 +81,7 @@ enum { 
	board_ahci_vt8251	= 2,

	board_ahci_ign_iferr	= 3,

	board_ahci_sb600	= 4,

	board_ahci_mv		= 5,



	/* global controller registers */

	HOST_CAP		= 0x00, /* host capabilities */
@@ -171,6 +172,8 @@ enum { 
	AHCI_FLAG_HONOR_PI		= (1 << 26), /* honor PORTS_IMPL */

	AHCI_FLAG_IGN_SERR_INTERNAL	= (1 << 27), /* ignore SERR_INTERNAL */

	AHCI_FLAG_32BIT_ONLY		= (1 << 28), /* force 32bit */

	AHCI_FLAG_MV_PATA		= (1 << 29), /* PATA port */

	AHCI_FLAG_NO_MSI		= (1 << 30), /* no PCI MSI */



	AHCI_FLAG_COMMON		= ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |

					  ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |
@@ -228,9 +231,12 @@ static void ahci_thaw(struct ata_port *ap); 
static void ahci_error_handler(struct ata_port *ap);

static void ahci_vt8251_error_handler(struct ata_port *ap);

static void ahci_post_internal_cmd(struct ata_queued_cmd *qc);

static int ahci_port_resume(struct ata_port *ap);

static unsigned int ahci_fill_sg(struct ata_queued_cmd *qc, void *cmd_tbl);

static void ahci_fill_cmd_slot(struct ahci_port_priv *pp, unsigned int tag,

			       u32 opts);

#ifdef CONFIG_PM

static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg);

static int ahci_port_resume(struct ata_port *ap);

static int ahci_pci_device_suspend(struct pci_dev *pdev, pm_message_t mesg);

static int ahci_pci_device_resume(struct pci_dev *pdev);

#endif
@@ -327,14 +333,14 @@ static const struct ata_port_info ahci_port_info[] = { 
	{

		.flags		= AHCI_FLAG_COMMON,

		.pio_mask	= 0x1f, /* pio0-4 */

		.udma_mask	= 0x7f, /* udma0-6 ; FIXME */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &ahci_ops,

	},

	/* board_ahci_pi */

	{

		.flags		= AHCI_FLAG_COMMON | AHCI_FLAG_HONOR_PI,

		.pio_mask	= 0x1f, /* pio0-4 */

		.udma_mask	= 0x7f, /* udma0-6 ; FIXME */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &ahci_ops,

	},

	/* board_ahci_vt8251 */
@@ -342,14 +348,14 @@ static const struct ata_port_info ahci_port_info[] = { 
		.flags		= AHCI_FLAG_COMMON | ATA_FLAG_HRST_TO_RESUME |

				  AHCI_FLAG_NO_NCQ,

		.pio_mask	= 0x1f, /* pio0-4 */

		.udma_mask	= 0x7f, /* udma0-6 ; FIXME */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &ahci_vt8251_ops,

	},

	/* board_ahci_ign_iferr */

	{

		.flags		= AHCI_FLAG_COMMON | AHCI_FLAG_IGN_IRQ_IF_ERR,

		.pio_mask	= 0x1f, /* pio0-4 */

		.udma_mask	= 0x7f, /* udma0-6 ; FIXME */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &ahci_ops,

	},

	/* board_ahci_sb600 */
@@ -358,7 +364,19 @@ static const struct ata_port_info ahci_port_info[] = { 
				  AHCI_FLAG_IGN_SERR_INTERNAL |

				  AHCI_FLAG_32BIT_ONLY,

		.pio_mask	= 0x1f, /* pio0-4 */

		.udma_mask	= 0x7f, /* udma0-6 ; FIXME */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &ahci_ops,

	},

	/* board_ahci_mv */

	{

		.sht		= &ahci_sht,

		.flags		= ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |

				  ATA_FLAG_MMIO | ATA_FLAG_PIO_DMA |

				  ATA_FLAG_SKIP_D2H_BSY | AHCI_FLAG_HONOR_PI |

				  AHCI_FLAG_NO_NCQ | AHCI_FLAG_NO_MSI |

				  AHCI_FLAG_MV_PATA,

		.pio_mask	= 0x1f, /* pio0-4 */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &ahci_ops,

	},

};
@@ -456,6 +474,9 @@ static const struct pci_device_id ahci_pci_tbl[] = { 
	{ PCI_VDEVICE(SI, 0x1185), board_ahci }, /* SiS 966 */

	{ PCI_VDEVICE(SI, 0x0186), board_ahci }, /* SiS 968 */



	/* Marvell */

	{ PCI_VDEVICE(MARVELL, 0x6145), board_ahci_mv },	/* 6145 */



	/* Generic, PCI class code for AHCI */

	{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,

	  PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci },
@@ -481,11 +502,17 @@ static inline int ahci_nr_ports(u32 cap) 
	return (cap & 0x1f) + 1;

}



static inline void __iomem *ahci_port_base(struct ata_port *ap)

static inline void __iomem *__ahci_port_base(struct ata_host *host,

					     unsigned int port_no)

{

	void __iomem *mmio = ap->host->iomap[AHCI_PCI_BAR];

	void __iomem *mmio = host->iomap[AHCI_PCI_BAR];



	return mmio + 0x100 + (ap->port_no * 0x80);

	return mmio + 0x100 + (port_no * 0x80);

}



static inline void __iomem *ahci_port_base(struct ata_port *ap)

{

	return __ahci_port_base(ap->host, ap->port_no);

}



/**
@@ -535,6 +562,20 @@ static void ahci_save_initial_config(struct pci_dev *pdev, 
		hpriv->saved_port_map = port_map;

	}



	/*

	 * Temporary Marvell 6145 hack: PATA port presence

	 * is asserted through the standard AHCI port

	 * presence register, as bit 4 (counting from 0)

	 */

	if (pi->flags & AHCI_FLAG_MV_PATA) {

		dev_printk(KERN_ERR, &pdev->dev,

			   "MV_AHCI HACK: port_map %x -> %x\n",

			   hpriv->port_map,

			   hpriv->port_map & 0xf);



		port_map &= 0xf;

	}



	/* cross check port_map and cap.n_ports */

	if (pi->flags & AHCI_FLAG_HONOR_PI) {

		u32 tmp_port_map = port_map;
@@ -740,7 +781,7 @@ static void ahci_power_down(struct ata_port *ap) 
}

#endif



static void ahci_init_port(struct ata_port *ap)

static void ahci_start_port(struct ata_port *ap)

{

	/* enable FIS reception */

	ahci_start_fis_rx(ap);
@@ -814,20 +855,13 @@ static int ahci_reset_controller(struct ata_host *host) 
	return 0;

}



static void ahci_init_controller(struct ata_host *host)

static void ahci_port_init(struct pci_dev *pdev, struct ata_port *ap,

			   int port_no, void __iomem *mmio,

			   void __iomem *port_mmio)

{

	struct pci_dev *pdev = to_pci_dev(host->dev);

	void __iomem *mmio = host->iomap[AHCI_PCI_BAR];

	int i, rc;

	u32 tmp;



	for (i = 0; i < host->n_ports; i++) {

		struct ata_port *ap = host->ports[i];

		void __iomem *port_mmio = ahci_port_base(ap);

	const char *emsg = NULL;



		if (ata_port_is_dummy(ap))

			continue;

	int rc;

	u32 tmp;



	/* make sure port is not active */

	rc = ahci_deinit_port(ap, &emsg);
@@ -846,7 +880,37 @@ static void ahci_init_controller(struct ata_host *host) 
	if (tmp)

		writel(tmp, port_mmio + PORT_IRQ_STAT);



		writel(1 << i, mmio + HOST_IRQ_STAT);

	writel(1 << port_no, mmio + HOST_IRQ_STAT);

}



static void ahci_init_controller(struct ata_host *host)

{

	struct pci_dev *pdev = to_pci_dev(host->dev);

	void __iomem *mmio = host->iomap[AHCI_PCI_BAR];

	int i;

	void __iomem *port_mmio;

	u32 tmp;



	if (host->ports[0]->flags & AHCI_FLAG_MV_PATA) {

		port_mmio = __ahci_port_base(host, 4);



		writel(0, port_mmio + PORT_IRQ_MASK);



		/* clear port IRQ */

		tmp = readl(port_mmio + PORT_IRQ_STAT);

		VPRINTK("PORT_IRQ_STAT 0x%x\n", tmp);

		if (tmp)

			writel(tmp, port_mmio + PORT_IRQ_STAT);

	}



	for (i = 0; i < host->n_ports; i++) {

		struct ata_port *ap = host->ports[i];



		port_mmio = ahci_port_base(ap);

		if (ata_port_is_dummy(ap))

			continue;



		ahci_port_init(pdev, ap, i, mmio, port_mmio);

	}



	tmp = readl(mmio + HOST_CTL);
@@ -1232,7 +1296,7 @@ static void ahci_error_intr(struct ata_port *ap, u32 irq_stat) 
		ata_port_abort(ap);

}



static void ahci_host_intr(struct ata_port *ap)

static void ahci_port_intr(struct ata_port *ap)

{

	void __iomem *port_mmio = ap->ioaddr.cmd_addr;

	struct ata_eh_info *ehi = &ap->eh_info;
@@ -1358,7 +1422,7 @@ static irqreturn_t ahci_interrupt(int irq, void *dev_instance) 


		ap = host->ports[i];

		if (ap) {

			ahci_host_intr(ap);

			ahci_port_intr(ap);

			VPRINTK("port %u\n", i);

		} else {

			VPRINTK("port %u (no irq)\n", i);
@@ -1466,7 +1530,7 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg) 
		ahci_power_down(ap);

	else {

		ata_port_printk(ap, KERN_ERR, "%s (%d)\n", emsg, rc);

		ahci_init_port(ap);

		ahci_start_port(ap);

	}



	return rc;
@@ -1475,7 +1539,7 @@ static int ahci_port_suspend(struct ata_port *ap, pm_message_t mesg) 
static int ahci_port_resume(struct ata_port *ap)

{

	ahci_power_up(ap);

	ahci_init_port(ap);

	ahci_start_port(ap);



	return 0;

}
@@ -1573,13 +1637,8 @@ static int ahci_port_start(struct ata_port *ap) 


	ap->private_data = pp;



	/* power up port */

	ahci_power_up(ap);



	/* initialize port */

	ahci_init_port(ap);



	return 0;

	/* engage engines, captain */

	return ahci_port_resume(ap);

}



static void ahci_port_stop(struct ata_port *ap)
@@ -1724,7 +1783,7 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 
	if (rc)

		return rc;



	if (pci_enable_msi(pdev))

	if ((pi.flags & AHCI_FLAG_NO_MSI) || pci_enable_msi(pdev))

		pci_intx(pdev, 1);



	hpriv = devm_kzalloc(dev, sizeof(*hpriv), GFP_KERNEL);
@@ -1745,14 +1804,18 @@ static int ahci_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 
	host->private_data = hpriv;



	for (i = 0; i < host->n_ports; i++) {

		if (hpriv->port_map & (1 << i)) {

		struct ata_port *ap = host->ports[i];

		void __iomem *port_mmio = ahci_port_base(ap);



		/* standard SATA port setup */

		if (hpriv->port_map & (1 << i)) {

			ap->ioaddr.cmd_addr = port_mmio;

			ap->ioaddr.scr_addr = port_mmio + PORT_SCR;

		} else

			host->ports[i]->ops = &ata_dummy_port_ops;

		}



		/* disabled/not-implemented port */

		else

			ap->ops = &ata_dummy_port_ops;

	}



	/* initialize adapter */

drivers/ata/ata_generic.c

+2 −2
Original line number Diff line number Diff line
@@ -143,10 +143,10 @@ static int ata_generic_init_one(struct pci_dev *dev, const struct pci_device_id 
	u16 command;

	static const struct ata_port_info info = {

		.sht = &generic_sht,

		.flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,

		.flags = ATA_FLAG_SLAVE_POSS,

		.pio_mask = 0x1f,

		.mwdma_mask = 0x07,

		.udma_mask = 0x3f,

		.udma_mask = ATA_UDMA5,

		.port_ops = &generic_port_ops

	};

	const struct ata_port_info *ppi[] = { &info, NULL };

drivers/ata/ata_piix.c

+24 −11
Original line number Diff line number Diff line
@@ -200,6 +200,8 @@ static const struct pci_device_id piix_pci_tbl[] = { 
	/* ICH7/7-R (i945, i975) UDMA 100*/

	{ 0x8086, 0x27DF, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_133 },

	{ 0x8086, 0x269E, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },

	/* ICH8 Mobile PATA Controller */

	{ 0x8086, 0x2850, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },



	/* NOTE: The following PCI ids must be kept in sync with the

	 * list in drivers/pci/quirks.c.
@@ -495,7 +497,7 @@ static struct ata_port_info piix_port_info[] = { 
		.flags		= PIIX_SATA_FLAGS,

		.pio_mask	= 0x1f,	/* pio0-4 */

		.mwdma_mask	= 0x07, /* mwdma0-2 */

		.udma_mask	= 0x7f,	/* udma0-6 */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &piix_sata_ops,

	},
@@ -505,7 +507,7 @@ static struct ata_port_info piix_port_info[] = { 
		.flags		= PIIX_SATA_FLAGS | PIIX_FLAG_SCR,

		.pio_mask	= 0x1f,	/* pio0-4 */

		.mwdma_mask	= 0x07, /* mwdma0-2 */

		.udma_mask	= 0x7f,	/* udma0-6 */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &piix_sata_ops,

	},
@@ -516,7 +518,7 @@ static struct ata_port_info piix_port_info[] = { 
				  PIIX_FLAG_AHCI,

		.pio_mask	= 0x1f,	/* pio0-4 */

		.mwdma_mask	= 0x07, /* mwdma0-2 */

		.udma_mask	= 0x7f,	/* udma0-6 */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &piix_sata_ops,

	},
@@ -527,7 +529,7 @@ static struct ata_port_info piix_port_info[] = { 
				  PIIX_FLAG_AHCI,

		.pio_mask	= 0x1f,	/* pio0-4 */

		.mwdma_mask	= 0x07, /* mwdma0-2 */

		.udma_mask	= 0x7f,	/* udma0-6 */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &piix_sata_ops,

	},
@@ -538,7 +540,7 @@ static struct ata_port_info piix_port_info[] = { 
				  PIIX_FLAG_AHCI,

		.pio_mask	= 0x1f,	/* pio0-4 */

		.mwdma_mask	= 0x07, /* mwdma0-2 */

		.udma_mask	= 0x7f,	/* udma0-6 */

		.udma_mask	= ATA_UDMA6,

		.port_ops	= &piix_sata_ops,

	},
@@ -685,8 +687,14 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev) 
	if (adev->class == ATA_DEV_ATA)

		control |= 4;	/* PPE enable */



	/* PIO configuration clears DTE unconditionally.  It will be

	 * programmed in set_dmamode which is guaranteed to be called

	 * after set_piomode if any DMA mode is available.

	 */

	pci_read_config_word(dev, master_port, &master_data);

	if (is_slave) {

		/* clear TIME1|IE1|PPE1|DTE1 */

		master_data &= 0xff0f;

		/* Enable SITRE (seperate slave timing register) */

		master_data |= 0x4000;

		/* enable PPE1, IE1 and TIME1 as needed */
@@ -694,12 +702,14 @@ static void piix_set_piomode (struct ata_port *ap, struct ata_device *adev) 
		pci_read_config_byte(dev, slave_port, &slave_data);

		slave_data &= (ap->port_no ? 0x0f : 0xf0);

		/* Load the timing nibble for this slave */

		slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);

		slave_data |= ((timings[pio][0] << 2) | timings[pio][1])

						<< (ap->port_no ? 4 : 0);

	} else {

		/* Master keeps the bits in a different format */

		master_data &= 0xccf8;

		/* clear ISP|RCT|TIME0|IE0|PPE0|DTE0 */

		master_data &= 0xccf0;

		/* Enable PPE, IE and TIME as appropriate */

		master_data |= control;

		/* load ISP and RCT */

		master_data |=

			(timings[pio][0] << 12) |

			(timings[pio][1] << 8);
@@ -816,7 +826,7 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i 
			master_data &= 0xFF4F;  /* Mask out IORDY|TIME1|DMAONLY */

			master_data |= control << 4;

			pci_read_config_byte(dev, 0x44, &slave_data);

			slave_data &= (0x0F + 0xE1 * ap->port_no);

			slave_data &= (ap->port_no ? 0x0f : 0xf0);

			/* Load the matching timing */

			slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << (ap->port_no ? 4 : 0);

			pci_write_config_byte(dev, 0x44, slave_data);
@@ -828,9 +838,12 @@ static void do_pata_set_dmamode (struct ata_port *ap, struct ata_device *adev, i 
				(timings[pio][0] << 12) |

				(timings[pio][1] << 8);

		}



		if (ap->udma_mask) {

			udma_enable &= ~(1 << devid);

			pci_write_config_word(dev, master_port, master_data);

		}

	}

	/* Don't scribble on 0x48 if the controller does not support UDMA */

	if (ap->udma_mask)

		pci_write_config_byte(dev, 0x48, udma_enable);

drivers/ata/libata-acpi.c

+401 −513

File changed.

Preview size limit exceeded, changes collapsed.

drivers/ata/libata-core.c

+92 −13
Original line number Diff line number Diff line
@@ -1845,7 +1845,8 @@ static void ata_dev_config_ncq(struct ata_device *dev, 
int ata_dev_configure(struct ata_device *dev)

{

	struct ata_port *ap = dev->ap;

	int print_info = ap->eh_context.i.flags & ATA_EHI_PRINTINFO;

	struct ata_eh_context *ehc = &ap->eh_context;

	int print_info = ehc->i.flags & ATA_EHI_PRINTINFO;

	const u16 *id = dev->id;

	unsigned int xfer_mask;

	char revbuf[7];		/* XYZ-99\0 */
@@ -1862,15 +1863,10 @@ int ata_dev_configure(struct ata_device *dev) 
	if (ata_msg_probe(ap))

		ata_dev_printk(dev, KERN_DEBUG, "%s: ENTER\n", __FUNCTION__);



	/* set _SDD */

	rc = ata_acpi_push_id(dev);

	if (rc) {

		ata_dev_printk(dev, KERN_WARNING, "failed to set _SDD(%d)\n",

			rc);

	}



	/* retrieve and execute the ATA task file of _GTF */

	ata_acpi_exec_tfs(ap);

	/* let ACPI work its magic */

	rc = ata_acpi_on_devcfg(dev);

	if (rc)

		return rc;



	/* print device capabilities */

	if (ata_msg_probe(ap))
@@ -3359,7 +3355,7 @@ int ata_std_prereset(struct ata_port *ap, unsigned long deadline) 
		return 0;



	/* if SATA, resume phy */

	if (ap->cbl == ATA_CBL_SATA) {

	if (ap->flags & ATA_FLAG_SATA) {

		rc = sata_phy_resume(ap, timing, deadline);

		/* whine about phy resume failure but proceed */

		if (rc && rc != -EOPNOTSUPP)
@@ -4106,6 +4102,68 @@ static void ata_fill_sg(struct ata_queued_cmd *qc) 
		ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);

}



/**

 *	ata_fill_sg_dumb - Fill PCI IDE PRD table

 *	@qc: Metadata associated with taskfile to be transferred

 *

 *	Fill PCI IDE PRD (scatter-gather) table with segments

 *	associated with the current disk command. Perform the fill

 *	so that we avoid writing any length 64K records for

 *	controllers that don't follow the spec.

 *

 *	LOCKING:

 *	spin_lock_irqsave(host lock)

 *

 */

static void ata_fill_sg_dumb(struct ata_queued_cmd *qc)

{

	struct ata_port *ap = qc->ap;

	struct scatterlist *sg;

	unsigned int idx;



	WARN_ON(qc->__sg == NULL);

	WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);



	idx = 0;

	ata_for_each_sg(sg, qc) {

		u32 addr, offset;

		u32 sg_len, len, blen;



 		/* determine if physical DMA addr spans 64K boundary.

		 * Note h/w doesn't support 64-bit, so we unconditionally

		 * truncate dma_addr_t to u32.

		 */

		addr = (u32) sg_dma_address(sg);

		sg_len = sg_dma_len(sg);



		while (sg_len) {

			offset = addr & 0xffff;

			len = sg_len;

			if ((offset + sg_len) > 0x10000)

				len = 0x10000 - offset;



			blen = len & 0xffff;

			ap->prd[idx].addr = cpu_to_le32(addr);

			if (blen == 0) {

			   /* Some PATA chipsets like the CS5530 can't

			      cope with 0x0000 meaning 64K as the spec says */

				ap->prd[idx].flags_len = cpu_to_le32(0x8000);

				blen = 0x8000;

				ap->prd[++idx].addr = cpu_to_le32(addr + 0x8000);

			}

			ap->prd[idx].flags_len = cpu_to_le32(blen);

			VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);



			idx++;

			sg_len -= len;

			addr += len;

		}

	}



	if (idx)

		ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);

}



/**

 *	ata_check_atapi_dma - Check whether ATAPI DMA can be supported

 *	@qc: Metadata associated with taskfile to check
@@ -4153,6 +4211,23 @@ void ata_qc_prep(struct ata_queued_cmd *qc) 
	ata_fill_sg(qc);

}



/**

 *	ata_dumb_qc_prep - Prepare taskfile for submission

 *	@qc: Metadata associated with taskfile to be prepared

 *

 *	Prepare ATA taskfile for submission.

 *

 *	LOCKING:

 *	spin_lock_irqsave(host lock)

 */

void ata_dumb_qc_prep(struct ata_queued_cmd *qc)

{

	if (!(qc->flags & ATA_QCFLAG_DMAMAP))

		return;



	ata_fill_sg_dumb(qc);

}



void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }



/**
@@ -5660,7 +5735,7 @@ irqreturn_t ata_interrupt (int irq, void *dev_instance) 
 */

int sata_scr_valid(struct ata_port *ap)

{

	return ap->cbl == ATA_CBL_SATA && ap->ops->scr_read;

	return (ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read;

}



/**
@@ -6293,6 +6368,9 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) 
	if (rc)

		return rc;



	/* associate with ACPI nodes */

	ata_acpi_associate(host);



	/* set cable, sata_spd_limit and report */

	for (i = 0; i < host->n_ports; i++) {

		struct ata_port *ap = host->ports[i];
@@ -6324,7 +6402,7 @@ int ata_host_register(struct ata_host *host, struct scsi_host_template *sht) 
		if (!ata_port_is_dummy(ap))

			ata_port_printk(ap, KERN_INFO, "%cATA max %s cmd 0x%p "

					"ctl 0x%p bmdma 0x%p irq %d\n",

					ap->cbl == ATA_CBL_SATA ? 'S' : 'P',

					(ap->flags & ATA_FLAG_SATA) ? 'S' : 'P',

					ata_mode_string(xfer_mask),

					ap->ioaddr.cmd_addr,

					ap->ioaddr.ctl_addr,
@@ -6822,6 +6900,7 @@ EXPORT_SYMBOL_GPL(ata_do_set_mode); 
EXPORT_SYMBOL_GPL(ata_data_xfer);

EXPORT_SYMBOL_GPL(ata_data_xfer_noirq);

EXPORT_SYMBOL_GPL(ata_qc_prep);

EXPORT_SYMBOL_GPL(ata_dumb_qc_prep);

EXPORT_SYMBOL_GPL(ata_noop_qc_prep);

EXPORT_SYMBOL_GPL(ata_bmdma_setup);

EXPORT_SYMBOL_GPL(ata_bmdma_start);