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Commit 63e9e1c2 authored by Christophe Leroy's avatar Christophe Leroy Committed by Scott Wood
Browse files

powerpc/8xx: remove special handling of CPU6 errata in set_dec() 



CPU6 ERRATA is now handled directly in mtspr(), so we can use the
standard set_dec() fonction in all cases.

Signed-off-by: default avatarChristophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: default avatarScott Wood <oss@buserror.net>
parent 1458dd95

arch/powerpc/include/asm/time.h

+1 −5
Original line number Diff line number Diff line
@@ -31,8 +31,6 @@ extern void tick_broadcast_ipi_handler(void); 


extern void generic_calibrate_decr(void);



extern void set_dec_cpu6(unsigned int val);



/* Some sane defaults: 125 MHz timebase, 1GHz processor */

extern unsigned long ppc_proc_freq;

#define DEFAULT_PROC_FREQ	(DEFAULT_TB_FREQ * 8)
@@ -166,14 +164,12 @@ static inline void set_dec(int val) 
{

#if defined(CONFIG_40x)

	mtspr(SPRN_PIT, val);

#elif defined(CONFIG_8xx_CPU6)

	set_dec_cpu6(val - 1);

#else

#ifndef CONFIG_BOOKE

	--val;

#endif

	mtspr(SPRN_DEC, val);

#endif /* not 40x or 8xx_CPU6 */

#endif /* not 40x */

}



static inline unsigned long tb_ticks_since(unsigned long tstamp)

arch/powerpc/kernel/head_8xx.S

+0 −18
Original line number Diff line number Diff line
@@ -926,24 +926,6 @@ _GLOBAL(set_context) 
	SYNC

	blr



#ifdef CONFIG_8xx_CPU6

/* It's here because it is unique to the 8xx.

 * It is important we get called with interrupts disabled.  I used to

 * do that, but it appears that all code that calls this already had

 * interrupt disabled.

 */

	.globl	set_dec_cpu6

set_dec_cpu6:

	lis	r7, cpu6_errata_word@h

	ori	r7, r7, cpu6_errata_word@l

	li	r4, 0x2c00

	stw	r4, 8(r7)

	lwz	r4, 8(r7)

        mtspr   22, r3		/* Update Decrementer */

	SYNC

	blr

#endif



/*

 * We put a few things here that have to be page-aligned.

 * This stuff goes at the beginning of the data segment,