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Commit 61234fa5 authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
Browse files

drm/i915: Wait for PHY port ready before link training on VLV/CHV 



There's no point in checking if the data lanes came out of reset after
link training. If the data lanes aren't ready link training will fail
anyway.

Suggested-by: default avatarTodd Previte <tprevite@gmail.com>
Cc: Todd Previte <tprevite@gmail.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: default avatarImre Deak <imre.deak@intel.com>
Acked-by: default avatarTodd Previte <tprevite@gmail.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 093e3f13

drivers/gpu/drm/i915/intel_dp.c

+3 −4
Original line number Diff line number Diff line
@@ -2550,6 +2550,9 @@ static void intel_enable_dp(struct intel_encoder *encoder) 


	pps_unlock(intel_dp);



	if (IS_VALLEYVIEW(dev))

		vlv_wait_port_ready(dev_priv, dp_to_dig_port(intel_dp));



	intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON);

	intel_dp_start_link_train(intel_dp);

	intel_dp_complete_link_train(intel_dp);
@@ -2685,8 +2688,6 @@ static void vlv_pre_enable_dp(struct intel_encoder *encoder) 
	mutex_unlock(&dev_priv->dpio_lock);



	intel_enable_dp(encoder);



	vlv_wait_port_ready(dev_priv, dport);

}



static void vlv_dp_pre_pll_enable(struct intel_encoder *encoder)
@@ -2779,8 +2780,6 @@ static void chv_pre_enable_dp(struct intel_encoder *encoder) 
	mutex_unlock(&dev_priv->dpio_lock);



	intel_enable_dp(encoder);



	vlv_wait_port_ready(dev_priv, dport);

}



static void chv_dp_pre_pll_enable(struct intel_encoder *encoder)