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Commit 6107497e authored by Arun Siluvery's avatar Arun Siluvery Committed by Daniel Vetter
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drm/i915/skl: Add GEN8_L3SQCREG4 to HW whitelist 



Required for WaDisableLSQCROPERFforOCL:skl

This register is added to HW whitelist to support WA required for future
enabling of pre-emptive command execution, WA implementation will be in
userspace and it cannot program this register if it is not on HW whitelist.

v2: explain purpose of changes (Chris)

Reviewed-by: default avatarNick Hoath <nicholas.hoath@intel.com>
Signed-off-by: default avatarArun Siluvery <arun.siluvery@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1453412634-29238-7-git-send-email-arun.siluvery@linux.intel.com


Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent a786d53a

drivers/gpu/drm/i915/intel_ringbuffer.c

+5 −0
Original line number Diff line number Diff line
@@ -1098,6 +1098,11 @@ static int skl_init_workarounds(struct intel_engine_cs *ring) 
			GEN7_HALF_SLICE_CHICKEN1,

			GEN7_SBE_SS_CACHE_DISPATCH_PORT_SHARING_DISABLE);



	/* WaDisableLSQCROPERFforOCL:skl */

	ret = wa_ring_whitelist_reg(ring, GEN8_L3SQCREG4);

	if (ret)

		return ret;



	return skl_tune_iz_hashing(ring);

}