Loading Documentation/devicetree/bindings/display/msm/dsi.txt +8 −0 Original line number Diff line number Diff line Loading @@ -121,6 +121,12 @@ Optional properties: If ping pong split is enabled, this time should not be higher than two times the dsi link rate time. If the property is not specified, then the default value is 14000 us. - qcom,panel-allow-phy-poweroff: A boolean property indicates that panel allows to turn off the phy power supply during idle screen. A panel should be able to handle the dsi lanes in floating state(not LP00 or LP11) to turn on this property. Software turns off PHY pmic power supply, phy ldo and DSI Lane ldo during idle screen (footswitch control off) when this property is enabled. - qcom,dsi-phy-regulator-min-datarate-bps: Minimum per lane data rate (bps) to turn on PHY regulator. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/graph.txt Loading Loading @@ -229,4 +235,6 @@ Example: vddio-supply = <&pma8084_l12>; qcom,dsi-phy-regulator-ldo-mode; qcom,panel-allow-phy-poweroff; qcom,dsi-phy-regulator-min-datarate-bps = <1200000000>; }; arch/arm64/boot/dts/qcom/sdm855-sde.dtsi +7 −2 Original line number Diff line number Diff line Loading @@ -555,7 +555,10 @@ vdda-1p2-supply = <&pm855_l3>; vdda-0p9-supply = <&pm855_l5>; reg = <0xae90000 0xa84>, reg = <0xae90000 0x0dc>, <0xae90200 0x0c0>, <0xae90400 0x508>, <0xae90a00 0x094>, <0x88eaa00 0x200>, <0x88ea200 0x200>, <0x88ea600 0x200>, Loading @@ -564,7 +567,9 @@ <0x88ea030 0x10>, <0x88e8000 0x20>, <0x0aee1000 0x034>; reg-names = "dp_ctrl", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", /* dp_ctrl: dp_ahb, dp_aux, dp_link, dp_p0 */ reg-names = "dp_ahb", "dp_aux", "dp_link", "dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", "dp_mmss_cc", "qfprom_physical", "dp_pll", "usb3_dp_com", "hdcp_physical"; Loading drivers/gpu/drm/msm/dp/dp_audio.c +108 −31 Original line number Diff line number Diff line Loading @@ -44,6 +44,8 @@ struct dp_audio_private { u32 channels; struct completion hpd_comp; struct workqueue_struct *notify_workqueue; struct delayed_work notify_delayed_work; struct dp_audio dp_audio; }; Loading Loading @@ -465,12 +467,16 @@ static int dp_audio_info_setup(struct platform_device *pdev, goto end; } mutex_lock(&audio->dp_audio.ops_lock); audio->channels = params->num_of_channels; dp_audio_setup_sdp(audio); dp_audio_setup_acr(audio); dp_audio_safe_to_exit_level(audio); dp_audio_enable(audio, true); mutex_unlock(&audio->dp_audio.ops_lock); end: return rc; } Loading Loading @@ -545,7 +551,9 @@ static void dp_audio_teardown_done(struct platform_device *pdev) if (IS_ERR(audio)) return; mutex_lock(&audio->dp_audio.ops_lock); dp_audio_enable(audio, false); mutex_unlock(&audio->dp_audio.ops_lock); complete_all(&audio->hpd_comp); Loading Loading @@ -585,6 +593,24 @@ static int dp_audio_ack_done(struct platform_device *pdev, u32 ack) return rc; } static int dp_audio_codec_ready(struct platform_device *pdev) { int rc = 0; struct dp_audio_private *audio; audio = dp_audio_get_data(pdev); if (IS_ERR(audio)) { pr_err("invalid input\n"); rc = PTR_ERR(audio); goto end; } queue_delayed_work(audio->notify_workqueue, &audio->notify_delayed_work, HZ/4); end: return rc; } static int dp_audio_init_ext_disp(struct dp_audio_private *audio) { int rc = 0; Loading @@ -606,6 +632,7 @@ static int dp_audio_init_ext_disp(struct dp_audio_private *audio) ops->get_intf_id = dp_audio_get_intf_id; ops->teardown_done = dp_audio_teardown_done; ops->acknowledge = dp_audio_ack_done; ops->ready = dp_audio_codec_ready; if (!audio->pdev->dev.of_node) { pr_err("cannot find audio dev.of_node\n"); Loading Loading @@ -637,6 +664,31 @@ static int dp_audio_init_ext_disp(struct dp_audio_private *audio) return rc; } static int dp_audio_notify(struct dp_audio_private *audio, u32 state) { int rc = 0; struct msm_ext_disp_init_data *ext = &audio->ext_audio_data; rc = ext->intf_ops.audio_notify(audio->ext_pdev, EXT_DISPLAY_TYPE_DP, state); if (rc) { pr_err("failed to notify audio. state=%d err=%d\n", state, rc); goto end; } reinit_completion(&audio->hpd_comp); rc = wait_for_completion_timeout(&audio->hpd_comp, HZ * 5); if (!rc) { pr_err("timeout. state=%d err=%d\n", state, rc); rc = -ETIMEDOUT; goto end; } pr_debug("success\n"); end: return rc; } static int dp_audio_on(struct dp_audio *dp_audio) { int rc = 0; Loading @@ -645,11 +697,14 @@ static int dp_audio_on(struct dp_audio *dp_audio) if (!dp_audio) { pr_err("invalid input\n"); rc = -EINVAL; goto end; return -EINVAL; } audio = container_of(dp_audio, struct dp_audio_private, dp_audio); if (IS_ERR(audio)) { pr_err("invalid input\n"); return -EINVAL; } ext = &audio->ext_audio_data; Loading @@ -663,21 +718,9 @@ static int dp_audio_on(struct dp_audio *dp_audio) goto end; } rc = ext->intf_ops.audio_notify(audio->ext_pdev, EXT_DISPLAY_TYPE_DP, EXT_DISPLAY_CABLE_CONNECT); if (rc) { pr_err("failed to notify audio, err=%d\n", rc); goto end; } reinit_completion(&audio->hpd_comp); rc = wait_for_completion_timeout(&audio->hpd_comp, HZ * 5); if (!rc) { pr_err("timeout\n"); rc = -ETIMEDOUT; rc = dp_audio_notify(audio, EXT_DISPLAY_CABLE_CONNECT); if (rc) goto end; } pr_debug("success\n"); end: Loading @@ -689,6 +732,7 @@ static int dp_audio_off(struct dp_audio *dp_audio) int rc = 0; struct dp_audio_private *audio; struct msm_ext_disp_init_data *ext; bool work_pending = false; if (!dp_audio) { pr_err("invalid input\n"); Loading @@ -698,21 +742,13 @@ static int dp_audio_off(struct dp_audio *dp_audio) audio = container_of(dp_audio, struct dp_audio_private, dp_audio); ext = &audio->ext_audio_data; rc = ext->intf_ops.audio_notify(audio->ext_pdev, EXT_DISPLAY_TYPE_DP, EXT_DISPLAY_CABLE_DISCONNECT); if (rc) { pr_err("failed to notify audio, err=%d\n", rc); goto end; } work_pending = cancel_delayed_work_sync(&audio->notify_delayed_work); if (work_pending) pr_debug("pending notification work completed\n"); reinit_completion(&audio->hpd_comp); rc = wait_for_completion_timeout(&audio->hpd_comp, HZ * 5); if (!rc) { pr_err("timeout\n"); rc = -ETIMEDOUT; rc = dp_audio_notify(audio, EXT_DISPLAY_CABLE_DISCONNECT); if (rc) goto end; } pr_debug("success\n"); end: Loading @@ -728,6 +764,35 @@ static int dp_audio_off(struct dp_audio *dp_audio) return rc; } static void dp_audio_notify_work_fn(struct work_struct *work) { struct dp_audio_private *audio; struct delayed_work *dw = to_delayed_work(work); audio = container_of(dw, struct dp_audio_private, notify_delayed_work); dp_audio_notify(audio, EXT_DISPLAY_CABLE_CONNECT); } static int dp_audio_create_notify_workqueue(struct dp_audio_private *audio) { audio->notify_workqueue = create_workqueue("sdm_dp_audio_notify"); if (IS_ERR_OR_NULL(audio->notify_workqueue)) { pr_err("Error creating notify_workqueue\n"); return -EPERM; } INIT_DELAYED_WORK(&audio->notify_delayed_work, dp_audio_notify_work_fn); return 0; } static void dp_audio_destroy_notify_workqueue(struct dp_audio_private *audio) { if (audio->notify_workqueue) destroy_workqueue(audio->notify_workqueue); } struct dp_audio *dp_audio_get(struct platform_device *pdev, struct dp_panel *panel, struct dp_catalog_audio *catalog) Loading @@ -748,6 +813,10 @@ struct dp_audio *dp_audio_get(struct platform_device *pdev, goto error; } rc = dp_audio_create_notify_workqueue(audio); if (rc) goto error_notify_workqueue; init_completion(&audio->hpd_comp); audio->pdev = pdev; Loading @@ -756,18 +825,23 @@ struct dp_audio *dp_audio_get(struct platform_device *pdev, dp_audio = &audio->dp_audio; mutex_init(&dp_audio->ops_lock); dp_audio->on = dp_audio_on; dp_audio->off = dp_audio_off; rc = dp_audio_init_ext_disp(audio); if (rc) { devm_kfree(&pdev->dev, audio); goto error; goto error_ext_disp; } catalog->init(catalog); return dp_audio; error_ext_disp: dp_audio_destroy_notify_workqueue(audio); error_notify_workqueue: devm_kfree(&pdev->dev, audio); error: return ERR_PTR(rc); } Loading @@ -780,6 +854,9 @@ void dp_audio_put(struct dp_audio *dp_audio) return; audio = container_of(dp_audio, struct dp_audio_private, dp_audio); mutex_destroy(&dp_audio->ops_lock); dp_audio_destroy_notify_workqueue(audio); devm_kfree(&audio->pdev->dev, audio); } drivers/gpu/drm/msm/dp/dp_audio.h +2 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,8 @@ struct dp_audio { u32 lane_count; u32 bw_code; struct mutex ops_lock; /** * on() * Loading drivers/gpu/drm/msm/dp/dp_catalog.c +91 −40 Original line number Diff line number Diff line Loading @@ -84,7 +84,7 @@ static u32 dp_catalog_aux_read_data(struct dp_catalog_aux *aux) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; return dp_read(base + DP_AUX_DATA); end: Loading @@ -104,7 +104,7 @@ static int dp_catalog_aux_write_data(struct dp_catalog_aux *aux) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; dp_write(base + DP_AUX_DATA, aux->data); end: Loading @@ -124,7 +124,7 @@ static int dp_catalog_aux_write_trans(struct dp_catalog_aux *aux) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; dp_write(base + DP_AUX_TRANS_CTRL, aux->data); end: Loading @@ -145,7 +145,7 @@ static int dp_catalog_aux_clear_trans(struct dp_catalog_aux *aux, bool read) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; if (read) { data = dp_read(base + DP_AUX_TRANS_CTRL); Loading Loading @@ -195,7 +195,7 @@ static void dp_catalog_aux_reset(struct dp_catalog_aux *aux) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; aux_ctrl = dp_read(base + DP_AUX_CTRL); Loading @@ -220,7 +220,7 @@ static void dp_catalog_aux_enable(struct dp_catalog_aux *aux, bool enable) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; aux_ctrl = dp_read(base + DP_AUX_CTRL); Loading Loading @@ -297,7 +297,7 @@ static void dp_catalog_aux_get_irq(struct dp_catalog_aux *aux, bool cmd_busy) { u32 ack; struct dp_catalog_private *catalog; void __iomem *base; void __iomem *ahb_base; if (!aux) { pr_err("invalid input\n"); Loading @@ -305,14 +305,14 @@ static void dp_catalog_aux_get_irq(struct dp_catalog_aux *aux, bool cmd_busy) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; ahb_base = catalog->io->dp_ahb.base; aux->isr = dp_read(base + DP_INTR_STATUS); aux->isr = dp_read(ahb_base + DP_INTR_STATUS); aux->isr &= ~DP_INTR_MASK1; ack = aux->isr & DP_INTERRUPT_STATUS1; ack <<= 1; ack |= DP_INTR_MASK1; dp_write(base + DP_INTR_STATUS, ack); dp_write(ahb_base + DP_INTR_STATUS, ack); } /* controller related catalog functions */ Loading @@ -327,7 +327,7 @@ static u32 dp_catalog_ctrl_read_hdcp_status(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; return dp_read(base + DP_HDCP_STATUS); } Loading @@ -345,8 +345,8 @@ static void dp_catalog_panel_setup_infoframe_sdp(struct dp_catalog_panel *panel) } dp_catalog_get_priv(panel); base = catalog->io->ctrl_io.base; hdr = &panel->hdr_data.hdr_meta; base = catalog->io->dp_link.base; header = dp_read(base + MMSS_DP_VSCEXT_0); header |= panel->hdr_data.vscext_header_byte1; Loading Loading @@ -416,7 +416,7 @@ static void dp_catalog_panel_setup_vsc_sdp(struct dp_catalog_panel *panel) } dp_catalog_get_priv(panel); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; value = dp_read(base + MMSS_DP_GENERIC0_0); value |= panel->hdr_data.vsc_header_byte1; Loading Loading @@ -459,7 +459,7 @@ static void dp_catalog_panel_config_hdr(struct dp_catalog_panel *panel) } dp_catalog_get_priv(panel); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; cfg = dp_read(base + MMSS_DP_SDP_CFG); /* VSCEXT_SDP_EN */ Loading Loading @@ -518,7 +518,7 @@ static void dp_catalog_ctrl_update_transfer_unit(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_VALID_BOUNDARY, ctrl->valid_boundary); dp_write(base + DP_TU, ctrl->dp_tu); Loading @@ -536,7 +536,7 @@ static void dp_catalog_ctrl_state_ctrl(struct dp_catalog_ctrl *ctrl, u32 state) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_STATE_CTRL, state); } Loading @@ -544,7 +544,7 @@ static void dp_catalog_ctrl_state_ctrl(struct dp_catalog_ctrl *ctrl, u32 state) static void dp_catalog_ctrl_config_ctrl(struct dp_catalog_ctrl *ctrl, u32 cfg) { struct dp_catalog_private *catalog; void __iomem *base; void __iomem *link_base; if (!ctrl) { pr_err("invalid input\n"); Loading @@ -552,11 +552,11 @@ static void dp_catalog_ctrl_config_ctrl(struct dp_catalog_ctrl *ctrl, u32 cfg) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; link_base = catalog->io->dp_link.base; pr_debug("DP_CONFIGURATION_CTRL=0x%x\n", cfg); dp_write(base + DP_CONFIGURATION_CTRL, cfg); dp_write(link_base + DP_CONFIGURATION_CTRL, cfg); } static void dp_catalog_ctrl_lane_mapping(struct dp_catalog_ctrl *ctrl) Loading @@ -570,9 +570,9 @@ static void dp_catalog_ctrl_lane_mapping(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_LOGICAL2PHYSCIAL_LANE_MAPPING, 0xe4); dp_write(base + DP_LOGICAL2PHYSICAL_LANE_MAPPING, 0xe4); } static void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog_ctrl *ctrl, Loading @@ -588,7 +588,7 @@ static void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog_ctrl *ctrl, } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; if (enable) { dp_write(base + DP_MAINLINK_CTRL, 0x02000000); Loading Loading @@ -619,7 +619,7 @@ static void dp_catalog_ctrl_config_misc(struct dp_catalog_ctrl *ctrl, } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; misc_val |= (tb << 5); misc_val |= BIT(0); /* Configure clock to synchronous mode */ Loading Loading @@ -685,7 +685,7 @@ static void dp_catalog_ctrl_config_msa(struct dp_catalog_ctrl *ctrl, nvid *= 3; } base_ctrl = catalog->io->ctrl_io.base; base_ctrl = catalog->io->dp_link.base; pr_debug("mvid=0x%x, nvid=0x%x\n", mvid, nvid); dp_write(base_ctrl + DP_SOFTWARE_MVID, mvid); dp_write(base_ctrl + DP_SOFTWARE_NVID, nvid); Loading @@ -705,7 +705,7 @@ static void dp_catalog_ctrl_set_pattern(struct dp_catalog_ctrl *ctrl, } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; bit = 1; bit <<= (pattern - 1); Loading Loading @@ -759,7 +759,57 @@ static void dp_catalog_ctrl_usb_reset(struct dp_catalog_ctrl *ctrl, bool flip) dp_write(base + USB3_DP_COM_RESET_OVRD_CTRL, 0x00); /* make sure phy is brought out of reset */ wmb(); } static void dp_catalog_panel_tpg_cfg(struct dp_catalog_panel *panel, bool enable) { struct dp_catalog_private *catalog; void __iomem *base; if (!panel) { pr_err("invalid input\n"); return; } dp_catalog_get_priv(panel); base = catalog->io->dp_p0.base; if (!enable) { dp_write(base + MMSS_DP_TPG_MAIN_CONTROL, 0x0); dp_write(base + MMSS_DP_BIST_ENABLE, 0x0); dp_write(base + MMSS_DP_TIMING_ENGINE_EN, 0x0); wmb(); /* ensure Timing generator is turned off */ return; } dp_write(base + MMSS_DP_INTF_CONFIG, 0x0); dp_write(base + MMSS_DP_INTF_HSYNC_CTL, panel->hsync_ctl); dp_write(base + MMSS_DP_INTF_VSYNC_PERIOD_F0, panel->vsync_period * panel->hsync_period); dp_write(base + MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F0, panel->v_sync_width * panel->hsync_period); dp_write(base + MMSS_DP_INTF_VSYNC_PERIOD_F1, 0); dp_write(base + MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F1, 0); dp_write(base + MMSS_DP_INTF_DISPLAY_HCTL, panel->display_hctl); dp_write(base + MMSS_DP_INTF_ACTIVE_HCTL, 0); dp_write(base + MMSS_INTF_DISPLAY_V_START_F0, panel->display_v_start); dp_write(base + MMSS_DP_INTF_DISPLAY_V_END_F0, panel->display_v_end); dp_write(base + MMSS_INTF_DISPLAY_V_START_F1, 0); dp_write(base + MMSS_DP_INTF_DISPLAY_V_END_F1, 0); dp_write(base + MMSS_DP_INTF_ACTIVE_V_START_F0, 0); dp_write(base + MMSS_DP_INTF_ACTIVE_V_END_F0, 0); dp_write(base + MMSS_DP_INTF_ACTIVE_V_START_F1, 0); dp_write(base + MMSS_DP_INTF_ACTIVE_V_END_F1, 0); dp_write(base + MMSS_DP_INTF_POLARITY_CTL, 0); wmb(); /* ensure TPG registers are programmed */ dp_write(base + MMSS_DP_TPG_MAIN_CONTROL, 0x100); dp_write(base + MMSS_DP_TPG_VIDEO_CONFIG, 0x5); wmb(); /* ensure TPG config is programmed */ dp_write(base + MMSS_DP_BIST_ENABLE, 0x1); dp_write(base + MMSS_DP_TIMING_ENGINE_EN, 0x1); wmb(); /* ensure Timing generator is turned on */ } static void dp_catalog_ctrl_reset(struct dp_catalog_ctrl *ctrl) Loading @@ -774,7 +824,7 @@ static void dp_catalog_ctrl_reset(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; sw_reset = dp_read(base + DP_SW_RESET); Loading @@ -799,7 +849,7 @@ static bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; while (--cnt) { /* DP_MAINLINK_READY */ Loading @@ -826,7 +876,7 @@ static void dp_catalog_ctrl_enable_irq(struct dp_catalog_ctrl *ctrl, } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; if (enable) { dp_write(base + DP_INTR_STATUS, DP_INTR_MASK1); Loading @@ -848,7 +898,7 @@ static void dp_catalog_ctrl_hpd_config(struct dp_catalog_ctrl *ctrl, bool en) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; if (en) { u32 reftimer = dp_read(base + DP_DP_HPD_REFTIMER); Loading Loading @@ -879,7 +929,7 @@ static void dp_catalog_ctrl_get_interrupt(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; ctrl->isr = dp_read(base + DP_INTR_STATUS2); ctrl->isr &= ~DP_INTR_MASK2; Loading @@ -900,7 +950,7 @@ static void dp_catalog_ctrl_phy_reset(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; dp_write(base + DP_PHY_CTRL, 0x5); /* bit 0 & 2 */ usleep_range(1000, 1010); /* h/w recommended delay */ Loading Loading @@ -989,7 +1039,7 @@ static void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog_ctrl *ctrl, dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_STATE_CTRL, 0x0); Loading Loading @@ -1050,7 +1100,7 @@ static u32 dp_catalog_ctrl_read_phy_pattern(struct dp_catalog_ctrl *ctrl) dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; return dp_read(base + DP_MAINLINK_READY); } Loading @@ -1067,7 +1117,7 @@ static int dp_catalog_panel_timing_cfg(struct dp_catalog_panel *panel) } dp_catalog_get_priv(panel); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_TOTAL_HOR_VER, panel->total); dp_write(base + DP_START_HOR_VER_FROM_SYNC, panel->sync_start); Loading Loading @@ -1127,7 +1177,7 @@ static void dp_catalog_audio_config_sdp(struct dp_catalog_audio *audio) return; dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; /* AUDIO_TIMESTAMP_SDP_EN */ sdp_cfg |= BIT(1); Loading Loading @@ -1166,7 +1216,7 @@ static void dp_catalog_audio_get_header(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; sdp_map = catalog->audio_map; sdp = audio->sdp_type; header = audio->sdp_header; Loading @@ -1188,7 +1238,7 @@ static void dp_catalog_audio_set_header(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; sdp_map = catalog->audio_map; sdp = audio->sdp_type; header = audio->sdp_header; Loading @@ -1206,7 +1256,7 @@ static void dp_catalog_audio_config_acr(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); select = audio->data; base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; acr_ctrl = select << 4 | BIT(31) | BIT(8) | BIT(14); Loading @@ -1223,7 +1273,7 @@ static void dp_catalog_audio_safe_to_exit_level(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; safe_to_exit_level = audio->data; mainlink_levels = dp_read(base + DP_MAINLINK_LEVELS); Loading @@ -1245,7 +1295,7 @@ static void dp_catalog_audio_enable(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; enable = !!audio->data; audio_ctrl = dp_read(base + MMSS_DP_AUDIO_CFG); Loading Loading @@ -1313,6 +1363,7 @@ struct dp_catalog *dp_catalog_get(struct device *dev, struct dp_io *io) struct dp_catalog_panel panel = { .timing_cfg = dp_catalog_panel_timing_cfg, .config_hdr = dp_catalog_panel_config_hdr, .tpg_config = dp_catalog_panel_tpg_cfg, }; if (!io) { Loading Loading
Documentation/devicetree/bindings/display/msm/dsi.txt +8 −0 Original line number Diff line number Diff line Loading @@ -121,6 +121,12 @@ Optional properties: If ping pong split is enabled, this time should not be higher than two times the dsi link rate time. If the property is not specified, then the default value is 14000 us. - qcom,panel-allow-phy-poweroff: A boolean property indicates that panel allows to turn off the phy power supply during idle screen. A panel should be able to handle the dsi lanes in floating state(not LP00 or LP11) to turn on this property. Software turns off PHY pmic power supply, phy ldo and DSI Lane ldo during idle screen (footswitch control off) when this property is enabled. - qcom,dsi-phy-regulator-min-datarate-bps: Minimum per lane data rate (bps) to turn on PHY regulator. [1] Documentation/devicetree/bindings/clock/clock-bindings.txt [2] Documentation/devicetree/bindings/graph.txt Loading Loading @@ -229,4 +235,6 @@ Example: vddio-supply = <&pma8084_l12>; qcom,dsi-phy-regulator-ldo-mode; qcom,panel-allow-phy-poweroff; qcom,dsi-phy-regulator-min-datarate-bps = <1200000000>; };
arch/arm64/boot/dts/qcom/sdm855-sde.dtsi +7 −2 Original line number Diff line number Diff line Loading @@ -555,7 +555,10 @@ vdda-1p2-supply = <&pm855_l3>; vdda-0p9-supply = <&pm855_l5>; reg = <0xae90000 0xa84>, reg = <0xae90000 0x0dc>, <0xae90200 0x0c0>, <0xae90400 0x508>, <0xae90a00 0x094>, <0x88eaa00 0x200>, <0x88ea200 0x200>, <0x88ea600 0x200>, Loading @@ -564,7 +567,9 @@ <0x88ea030 0x10>, <0x88e8000 0x20>, <0x0aee1000 0x034>; reg-names = "dp_ctrl", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", /* dp_ctrl: dp_ahb, dp_aux, dp_link, dp_p0 */ reg-names = "dp_ahb", "dp_aux", "dp_link", "dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1", "dp_mmss_cc", "qfprom_physical", "dp_pll", "usb3_dp_com", "hdcp_physical"; Loading
drivers/gpu/drm/msm/dp/dp_audio.c +108 −31 Original line number Diff line number Diff line Loading @@ -44,6 +44,8 @@ struct dp_audio_private { u32 channels; struct completion hpd_comp; struct workqueue_struct *notify_workqueue; struct delayed_work notify_delayed_work; struct dp_audio dp_audio; }; Loading Loading @@ -465,12 +467,16 @@ static int dp_audio_info_setup(struct platform_device *pdev, goto end; } mutex_lock(&audio->dp_audio.ops_lock); audio->channels = params->num_of_channels; dp_audio_setup_sdp(audio); dp_audio_setup_acr(audio); dp_audio_safe_to_exit_level(audio); dp_audio_enable(audio, true); mutex_unlock(&audio->dp_audio.ops_lock); end: return rc; } Loading Loading @@ -545,7 +551,9 @@ static void dp_audio_teardown_done(struct platform_device *pdev) if (IS_ERR(audio)) return; mutex_lock(&audio->dp_audio.ops_lock); dp_audio_enable(audio, false); mutex_unlock(&audio->dp_audio.ops_lock); complete_all(&audio->hpd_comp); Loading Loading @@ -585,6 +593,24 @@ static int dp_audio_ack_done(struct platform_device *pdev, u32 ack) return rc; } static int dp_audio_codec_ready(struct platform_device *pdev) { int rc = 0; struct dp_audio_private *audio; audio = dp_audio_get_data(pdev); if (IS_ERR(audio)) { pr_err("invalid input\n"); rc = PTR_ERR(audio); goto end; } queue_delayed_work(audio->notify_workqueue, &audio->notify_delayed_work, HZ/4); end: return rc; } static int dp_audio_init_ext_disp(struct dp_audio_private *audio) { int rc = 0; Loading @@ -606,6 +632,7 @@ static int dp_audio_init_ext_disp(struct dp_audio_private *audio) ops->get_intf_id = dp_audio_get_intf_id; ops->teardown_done = dp_audio_teardown_done; ops->acknowledge = dp_audio_ack_done; ops->ready = dp_audio_codec_ready; if (!audio->pdev->dev.of_node) { pr_err("cannot find audio dev.of_node\n"); Loading Loading @@ -637,6 +664,31 @@ static int dp_audio_init_ext_disp(struct dp_audio_private *audio) return rc; } static int dp_audio_notify(struct dp_audio_private *audio, u32 state) { int rc = 0; struct msm_ext_disp_init_data *ext = &audio->ext_audio_data; rc = ext->intf_ops.audio_notify(audio->ext_pdev, EXT_DISPLAY_TYPE_DP, state); if (rc) { pr_err("failed to notify audio. state=%d err=%d\n", state, rc); goto end; } reinit_completion(&audio->hpd_comp); rc = wait_for_completion_timeout(&audio->hpd_comp, HZ * 5); if (!rc) { pr_err("timeout. state=%d err=%d\n", state, rc); rc = -ETIMEDOUT; goto end; } pr_debug("success\n"); end: return rc; } static int dp_audio_on(struct dp_audio *dp_audio) { int rc = 0; Loading @@ -645,11 +697,14 @@ static int dp_audio_on(struct dp_audio *dp_audio) if (!dp_audio) { pr_err("invalid input\n"); rc = -EINVAL; goto end; return -EINVAL; } audio = container_of(dp_audio, struct dp_audio_private, dp_audio); if (IS_ERR(audio)) { pr_err("invalid input\n"); return -EINVAL; } ext = &audio->ext_audio_data; Loading @@ -663,21 +718,9 @@ static int dp_audio_on(struct dp_audio *dp_audio) goto end; } rc = ext->intf_ops.audio_notify(audio->ext_pdev, EXT_DISPLAY_TYPE_DP, EXT_DISPLAY_CABLE_CONNECT); if (rc) { pr_err("failed to notify audio, err=%d\n", rc); goto end; } reinit_completion(&audio->hpd_comp); rc = wait_for_completion_timeout(&audio->hpd_comp, HZ * 5); if (!rc) { pr_err("timeout\n"); rc = -ETIMEDOUT; rc = dp_audio_notify(audio, EXT_DISPLAY_CABLE_CONNECT); if (rc) goto end; } pr_debug("success\n"); end: Loading @@ -689,6 +732,7 @@ static int dp_audio_off(struct dp_audio *dp_audio) int rc = 0; struct dp_audio_private *audio; struct msm_ext_disp_init_data *ext; bool work_pending = false; if (!dp_audio) { pr_err("invalid input\n"); Loading @@ -698,21 +742,13 @@ static int dp_audio_off(struct dp_audio *dp_audio) audio = container_of(dp_audio, struct dp_audio_private, dp_audio); ext = &audio->ext_audio_data; rc = ext->intf_ops.audio_notify(audio->ext_pdev, EXT_DISPLAY_TYPE_DP, EXT_DISPLAY_CABLE_DISCONNECT); if (rc) { pr_err("failed to notify audio, err=%d\n", rc); goto end; } work_pending = cancel_delayed_work_sync(&audio->notify_delayed_work); if (work_pending) pr_debug("pending notification work completed\n"); reinit_completion(&audio->hpd_comp); rc = wait_for_completion_timeout(&audio->hpd_comp, HZ * 5); if (!rc) { pr_err("timeout\n"); rc = -ETIMEDOUT; rc = dp_audio_notify(audio, EXT_DISPLAY_CABLE_DISCONNECT); if (rc) goto end; } pr_debug("success\n"); end: Loading @@ -728,6 +764,35 @@ static int dp_audio_off(struct dp_audio *dp_audio) return rc; } static void dp_audio_notify_work_fn(struct work_struct *work) { struct dp_audio_private *audio; struct delayed_work *dw = to_delayed_work(work); audio = container_of(dw, struct dp_audio_private, notify_delayed_work); dp_audio_notify(audio, EXT_DISPLAY_CABLE_CONNECT); } static int dp_audio_create_notify_workqueue(struct dp_audio_private *audio) { audio->notify_workqueue = create_workqueue("sdm_dp_audio_notify"); if (IS_ERR_OR_NULL(audio->notify_workqueue)) { pr_err("Error creating notify_workqueue\n"); return -EPERM; } INIT_DELAYED_WORK(&audio->notify_delayed_work, dp_audio_notify_work_fn); return 0; } static void dp_audio_destroy_notify_workqueue(struct dp_audio_private *audio) { if (audio->notify_workqueue) destroy_workqueue(audio->notify_workqueue); } struct dp_audio *dp_audio_get(struct platform_device *pdev, struct dp_panel *panel, struct dp_catalog_audio *catalog) Loading @@ -748,6 +813,10 @@ struct dp_audio *dp_audio_get(struct platform_device *pdev, goto error; } rc = dp_audio_create_notify_workqueue(audio); if (rc) goto error_notify_workqueue; init_completion(&audio->hpd_comp); audio->pdev = pdev; Loading @@ -756,18 +825,23 @@ struct dp_audio *dp_audio_get(struct platform_device *pdev, dp_audio = &audio->dp_audio; mutex_init(&dp_audio->ops_lock); dp_audio->on = dp_audio_on; dp_audio->off = dp_audio_off; rc = dp_audio_init_ext_disp(audio); if (rc) { devm_kfree(&pdev->dev, audio); goto error; goto error_ext_disp; } catalog->init(catalog); return dp_audio; error_ext_disp: dp_audio_destroy_notify_workqueue(audio); error_notify_workqueue: devm_kfree(&pdev->dev, audio); error: return ERR_PTR(rc); } Loading @@ -780,6 +854,9 @@ void dp_audio_put(struct dp_audio *dp_audio) return; audio = container_of(dp_audio, struct dp_audio_private, dp_audio); mutex_destroy(&dp_audio->ops_lock); dp_audio_destroy_notify_workqueue(audio); devm_kfree(&audio->pdev->dev, audio); }
drivers/gpu/drm/msm/dp/dp_audio.h +2 −0 Original line number Diff line number Diff line Loading @@ -29,6 +29,8 @@ struct dp_audio { u32 lane_count; u32 bw_code; struct mutex ops_lock; /** * on() * Loading
drivers/gpu/drm/msm/dp/dp_catalog.c +91 −40 Original line number Diff line number Diff line Loading @@ -84,7 +84,7 @@ static u32 dp_catalog_aux_read_data(struct dp_catalog_aux *aux) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; return dp_read(base + DP_AUX_DATA); end: Loading @@ -104,7 +104,7 @@ static int dp_catalog_aux_write_data(struct dp_catalog_aux *aux) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; dp_write(base + DP_AUX_DATA, aux->data); end: Loading @@ -124,7 +124,7 @@ static int dp_catalog_aux_write_trans(struct dp_catalog_aux *aux) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; dp_write(base + DP_AUX_TRANS_CTRL, aux->data); end: Loading @@ -145,7 +145,7 @@ static int dp_catalog_aux_clear_trans(struct dp_catalog_aux *aux, bool read) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; if (read) { data = dp_read(base + DP_AUX_TRANS_CTRL); Loading Loading @@ -195,7 +195,7 @@ static void dp_catalog_aux_reset(struct dp_catalog_aux *aux) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; aux_ctrl = dp_read(base + DP_AUX_CTRL); Loading @@ -220,7 +220,7 @@ static void dp_catalog_aux_enable(struct dp_catalog_aux *aux, bool enable) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; aux_ctrl = dp_read(base + DP_AUX_CTRL); Loading Loading @@ -297,7 +297,7 @@ static void dp_catalog_aux_get_irq(struct dp_catalog_aux *aux, bool cmd_busy) { u32 ack; struct dp_catalog_private *catalog; void __iomem *base; void __iomem *ahb_base; if (!aux) { pr_err("invalid input\n"); Loading @@ -305,14 +305,14 @@ static void dp_catalog_aux_get_irq(struct dp_catalog_aux *aux, bool cmd_busy) } dp_catalog_get_priv(aux); base = catalog->io->ctrl_io.base; ahb_base = catalog->io->dp_ahb.base; aux->isr = dp_read(base + DP_INTR_STATUS); aux->isr = dp_read(ahb_base + DP_INTR_STATUS); aux->isr &= ~DP_INTR_MASK1; ack = aux->isr & DP_INTERRUPT_STATUS1; ack <<= 1; ack |= DP_INTR_MASK1; dp_write(base + DP_INTR_STATUS, ack); dp_write(ahb_base + DP_INTR_STATUS, ack); } /* controller related catalog functions */ Loading @@ -327,7 +327,7 @@ static u32 dp_catalog_ctrl_read_hdcp_status(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; return dp_read(base + DP_HDCP_STATUS); } Loading @@ -345,8 +345,8 @@ static void dp_catalog_panel_setup_infoframe_sdp(struct dp_catalog_panel *panel) } dp_catalog_get_priv(panel); base = catalog->io->ctrl_io.base; hdr = &panel->hdr_data.hdr_meta; base = catalog->io->dp_link.base; header = dp_read(base + MMSS_DP_VSCEXT_0); header |= panel->hdr_data.vscext_header_byte1; Loading Loading @@ -416,7 +416,7 @@ static void dp_catalog_panel_setup_vsc_sdp(struct dp_catalog_panel *panel) } dp_catalog_get_priv(panel); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; value = dp_read(base + MMSS_DP_GENERIC0_0); value |= panel->hdr_data.vsc_header_byte1; Loading Loading @@ -459,7 +459,7 @@ static void dp_catalog_panel_config_hdr(struct dp_catalog_panel *panel) } dp_catalog_get_priv(panel); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; cfg = dp_read(base + MMSS_DP_SDP_CFG); /* VSCEXT_SDP_EN */ Loading Loading @@ -518,7 +518,7 @@ static void dp_catalog_ctrl_update_transfer_unit(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_VALID_BOUNDARY, ctrl->valid_boundary); dp_write(base + DP_TU, ctrl->dp_tu); Loading @@ -536,7 +536,7 @@ static void dp_catalog_ctrl_state_ctrl(struct dp_catalog_ctrl *ctrl, u32 state) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_STATE_CTRL, state); } Loading @@ -544,7 +544,7 @@ static void dp_catalog_ctrl_state_ctrl(struct dp_catalog_ctrl *ctrl, u32 state) static void dp_catalog_ctrl_config_ctrl(struct dp_catalog_ctrl *ctrl, u32 cfg) { struct dp_catalog_private *catalog; void __iomem *base; void __iomem *link_base; if (!ctrl) { pr_err("invalid input\n"); Loading @@ -552,11 +552,11 @@ static void dp_catalog_ctrl_config_ctrl(struct dp_catalog_ctrl *ctrl, u32 cfg) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; link_base = catalog->io->dp_link.base; pr_debug("DP_CONFIGURATION_CTRL=0x%x\n", cfg); dp_write(base + DP_CONFIGURATION_CTRL, cfg); dp_write(link_base + DP_CONFIGURATION_CTRL, cfg); } static void dp_catalog_ctrl_lane_mapping(struct dp_catalog_ctrl *ctrl) Loading @@ -570,9 +570,9 @@ static void dp_catalog_ctrl_lane_mapping(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_LOGICAL2PHYSCIAL_LANE_MAPPING, 0xe4); dp_write(base + DP_LOGICAL2PHYSICAL_LANE_MAPPING, 0xe4); } static void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog_ctrl *ctrl, Loading @@ -588,7 +588,7 @@ static void dp_catalog_ctrl_mainlink_ctrl(struct dp_catalog_ctrl *ctrl, } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; if (enable) { dp_write(base + DP_MAINLINK_CTRL, 0x02000000); Loading Loading @@ -619,7 +619,7 @@ static void dp_catalog_ctrl_config_misc(struct dp_catalog_ctrl *ctrl, } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; misc_val |= (tb << 5); misc_val |= BIT(0); /* Configure clock to synchronous mode */ Loading Loading @@ -685,7 +685,7 @@ static void dp_catalog_ctrl_config_msa(struct dp_catalog_ctrl *ctrl, nvid *= 3; } base_ctrl = catalog->io->ctrl_io.base; base_ctrl = catalog->io->dp_link.base; pr_debug("mvid=0x%x, nvid=0x%x\n", mvid, nvid); dp_write(base_ctrl + DP_SOFTWARE_MVID, mvid); dp_write(base_ctrl + DP_SOFTWARE_NVID, nvid); Loading @@ -705,7 +705,7 @@ static void dp_catalog_ctrl_set_pattern(struct dp_catalog_ctrl *ctrl, } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; bit = 1; bit <<= (pattern - 1); Loading Loading @@ -759,7 +759,57 @@ static void dp_catalog_ctrl_usb_reset(struct dp_catalog_ctrl *ctrl, bool flip) dp_write(base + USB3_DP_COM_RESET_OVRD_CTRL, 0x00); /* make sure phy is brought out of reset */ wmb(); } static void dp_catalog_panel_tpg_cfg(struct dp_catalog_panel *panel, bool enable) { struct dp_catalog_private *catalog; void __iomem *base; if (!panel) { pr_err("invalid input\n"); return; } dp_catalog_get_priv(panel); base = catalog->io->dp_p0.base; if (!enable) { dp_write(base + MMSS_DP_TPG_MAIN_CONTROL, 0x0); dp_write(base + MMSS_DP_BIST_ENABLE, 0x0); dp_write(base + MMSS_DP_TIMING_ENGINE_EN, 0x0); wmb(); /* ensure Timing generator is turned off */ return; } dp_write(base + MMSS_DP_INTF_CONFIG, 0x0); dp_write(base + MMSS_DP_INTF_HSYNC_CTL, panel->hsync_ctl); dp_write(base + MMSS_DP_INTF_VSYNC_PERIOD_F0, panel->vsync_period * panel->hsync_period); dp_write(base + MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F0, panel->v_sync_width * panel->hsync_period); dp_write(base + MMSS_DP_INTF_VSYNC_PERIOD_F1, 0); dp_write(base + MMSS_DP_INTF_VSYNC_PULSE_WIDTH_F1, 0); dp_write(base + MMSS_DP_INTF_DISPLAY_HCTL, panel->display_hctl); dp_write(base + MMSS_DP_INTF_ACTIVE_HCTL, 0); dp_write(base + MMSS_INTF_DISPLAY_V_START_F0, panel->display_v_start); dp_write(base + MMSS_DP_INTF_DISPLAY_V_END_F0, panel->display_v_end); dp_write(base + MMSS_INTF_DISPLAY_V_START_F1, 0); dp_write(base + MMSS_DP_INTF_DISPLAY_V_END_F1, 0); dp_write(base + MMSS_DP_INTF_ACTIVE_V_START_F0, 0); dp_write(base + MMSS_DP_INTF_ACTIVE_V_END_F0, 0); dp_write(base + MMSS_DP_INTF_ACTIVE_V_START_F1, 0); dp_write(base + MMSS_DP_INTF_ACTIVE_V_END_F1, 0); dp_write(base + MMSS_DP_INTF_POLARITY_CTL, 0); wmb(); /* ensure TPG registers are programmed */ dp_write(base + MMSS_DP_TPG_MAIN_CONTROL, 0x100); dp_write(base + MMSS_DP_TPG_VIDEO_CONFIG, 0x5); wmb(); /* ensure TPG config is programmed */ dp_write(base + MMSS_DP_BIST_ENABLE, 0x1); dp_write(base + MMSS_DP_TIMING_ENGINE_EN, 0x1); wmb(); /* ensure Timing generator is turned on */ } static void dp_catalog_ctrl_reset(struct dp_catalog_ctrl *ctrl) Loading @@ -774,7 +824,7 @@ static void dp_catalog_ctrl_reset(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; sw_reset = dp_read(base + DP_SW_RESET); Loading @@ -799,7 +849,7 @@ static bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; while (--cnt) { /* DP_MAINLINK_READY */ Loading @@ -826,7 +876,7 @@ static void dp_catalog_ctrl_enable_irq(struct dp_catalog_ctrl *ctrl, } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; if (enable) { dp_write(base + DP_INTR_STATUS, DP_INTR_MASK1); Loading @@ -848,7 +898,7 @@ static void dp_catalog_ctrl_hpd_config(struct dp_catalog_ctrl *ctrl, bool en) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_aux.base; if (en) { u32 reftimer = dp_read(base + DP_DP_HPD_REFTIMER); Loading Loading @@ -879,7 +929,7 @@ static void dp_catalog_ctrl_get_interrupt(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; ctrl->isr = dp_read(base + DP_INTR_STATUS2); ctrl->isr &= ~DP_INTR_MASK2; Loading @@ -900,7 +950,7 @@ static void dp_catalog_ctrl_phy_reset(struct dp_catalog_ctrl *ctrl) } dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_ahb.base; dp_write(base + DP_PHY_CTRL, 0x5); /* bit 0 & 2 */ usleep_range(1000, 1010); /* h/w recommended delay */ Loading Loading @@ -989,7 +1039,7 @@ static void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog_ctrl *ctrl, dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_STATE_CTRL, 0x0); Loading Loading @@ -1050,7 +1100,7 @@ static u32 dp_catalog_ctrl_read_phy_pattern(struct dp_catalog_ctrl *ctrl) dp_catalog_get_priv(ctrl); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; return dp_read(base + DP_MAINLINK_READY); } Loading @@ -1067,7 +1117,7 @@ static int dp_catalog_panel_timing_cfg(struct dp_catalog_panel *panel) } dp_catalog_get_priv(panel); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; dp_write(base + DP_TOTAL_HOR_VER, panel->total); dp_write(base + DP_START_HOR_VER_FROM_SYNC, panel->sync_start); Loading Loading @@ -1127,7 +1177,7 @@ static void dp_catalog_audio_config_sdp(struct dp_catalog_audio *audio) return; dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; /* AUDIO_TIMESTAMP_SDP_EN */ sdp_cfg |= BIT(1); Loading Loading @@ -1166,7 +1216,7 @@ static void dp_catalog_audio_get_header(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; sdp_map = catalog->audio_map; sdp = audio->sdp_type; header = audio->sdp_header; Loading @@ -1188,7 +1238,7 @@ static void dp_catalog_audio_set_header(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; sdp_map = catalog->audio_map; sdp = audio->sdp_type; header = audio->sdp_header; Loading @@ -1206,7 +1256,7 @@ static void dp_catalog_audio_config_acr(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); select = audio->data; base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; acr_ctrl = select << 4 | BIT(31) | BIT(8) | BIT(14); Loading @@ -1223,7 +1273,7 @@ static void dp_catalog_audio_safe_to_exit_level(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; safe_to_exit_level = audio->data; mainlink_levels = dp_read(base + DP_MAINLINK_LEVELS); Loading @@ -1245,7 +1295,7 @@ static void dp_catalog_audio_enable(struct dp_catalog_audio *audio) dp_catalog_get_priv(audio); base = catalog->io->ctrl_io.base; base = catalog->io->dp_link.base; enable = !!audio->data; audio_ctrl = dp_read(base + MMSS_DP_AUDIO_CFG); Loading Loading @@ -1313,6 +1363,7 @@ struct dp_catalog *dp_catalog_get(struct device *dev, struct dp_io *io) struct dp_catalog_panel panel = { .timing_cfg = dp_catalog_panel_timing_cfg, .config_hdr = dp_catalog_panel_config_hdr, .tpg_config = dp_catalog_panel_tpg_cfg, }; if (!io) { Loading