Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 601c87eb authored by David Collins's avatar David Collins
Browse files

clk: qcom: add SM8150 sensor clock controller driver 



Add a sensor clock controller (SCC) driver which can be used to
control sensor clocks on boards in which the application
processor owns these clocks (e.g. SA8155).

Change-Id: Ia818af497fb171835256a6ff7bc167266f94c9c8
Signed-off-by: default avatarDavid Collins <collinsd@codeaurora.org>
parent d53d3a92

Documentation/devicetree/bindings/clock/qcom,scc.txt

0 → 100644
+15 −0
Original line number Original line Diff line number Diff line 
Qualcomm Technologies, Inc. Sensor Clock Controller Bindings



Required properties:

- compatible: shall contain "qcom,scc-sm8150" or "qcom,scc-sm8150-v2".

- reg: shall contain base register location and length.

- vdd_scc_cx-supply: the logic rail supply.

- #clock-cells: shall contain 1.



Example:

	qcom,scc@2b10000 {

		compatible = "qcom,scc-sm8150";

		reg = <0x2b10000 0x30000>;

		vdd_scc_cx-supply = <&VDD_CX_LEVEL>;

		#clock-cells = <1>;

	};

drivers/clk/qcom/Kconfig

+10 −0
Original line number Original line Diff line number Diff line
@@ -234,6 +234,16 @@ config MSM_NPUCC_SM8150 
	  SM8150 devices.

	  SM8150 devices.

	  Say Y if you want to enable use of the Network Processing Unit.

	  Say Y if you want to enable use of the Network Processing Unit.





config MSM_SCC_SM8150

	tristate "SM8150 Sensor Clock Controller"

	depends on COMMON_CLK_QCOM

	help

	  Support for the sensor clock controller on Qualcomm Technologies, Inc.

	  SM8150 devices.  The sensor controller contains several QUP clocks

	  which can be managed using DFS.  This controller is typically owned by

	  the sensor processor.  However, on some systems it is instead owned

	  by the application processor.



config MSM_VIDEOCC_SM8150

config MSM_VIDEOCC_SM8150

	tristate "SM8150 Video Clock Controller"

	tristate "SM8150 Video Clock Controller"

	depends on COMMON_CLK_QCOM

	depends on COMMON_CLK_QCOM

drivers/clk/qcom/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -59,6 +59,7 @@ obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o 
obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o

obj-$(CONFIG_MSM_MMCC_8996) += mmcc-msm8996.o

obj-$(CONFIG_MSM_NPUCC_SDMMAGPIE) += npucc-sdmmagpie.o

obj-$(CONFIG_MSM_NPUCC_SDMMAGPIE) += npucc-sdmmagpie.o

obj-$(CONFIG_MSM_NPUCC_SM8150) += npucc-sm8150.o

obj-$(CONFIG_MSM_NPUCC_SM8150) += npucc-sm8150.o

obj-$(CONFIG_MSM_SCC_SM8150) += scc-sm8150.o

obj-$(CONFIG_MSM_VIDEOCC_SDMMAGPIE) += videocc-sdmmagpie.o

obj-$(CONFIG_MSM_VIDEOCC_SDMMAGPIE) += videocc-sdmmagpie.o

obj-$(CONFIG_MSM_VIDEOCC_SM6150) += videocc-sm6150.o

obj-$(CONFIG_MSM_VIDEOCC_SM6150) += videocc-sm6150.o

obj-$(CONFIG_MSM_VIDEOCC_SM8150) += videocc-sm8150.o

obj-$(CONFIG_MSM_VIDEOCC_SM8150) += videocc-sm8150.o

drivers/clk/qcom/scc-sm8150.c

0 → 100644
+714 −0

File added.

Preview size limit exceeded, changes collapsed.

include/dt-bindings/clock/qcom,scc-sm8150.h

0 → 100644
+37 −0
Original line number Original line Diff line number Diff line 
/*

 * Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#ifndef _DT_BINDINGS_CLK_QCOM_SCC_SM8150_H

#define _DT_BINDINGS_CLK_QCOM_SCC_SM8150_H



#define SCC_MAIN_RCG_CLK_SRC					0

#define SCC_PLL							1

#define SCC_PLL_OUT_EVEN					2

#define SCC_QUPV3_2XCORE_CLK					3

#define SCC_QUPV3_CORE_CLK					4

#define SCC_QUPV3_M_HCLK_CLK					5

#define SCC_QUPV3_S_HCLK_CLK					6

#define SCC_QUPV3_SE0_CLK					7

#define SCC_QUPV3_SE0_CLK_SRC					8

#define SCC_QUPV3_SE1_CLK					9

#define SCC_QUPV3_SE1_CLK_SRC					10

#define SCC_QUPV3_SE2_CLK					11

#define SCC_QUPV3_SE2_CLK_SRC					12

#define SCC_QUPV3_SE3_CLK					13

#define SCC_QUPV3_SE3_CLK_SRC					14

#define SCC_QUPV3_SE4_CLK					15

#define SCC_QUPV3_SE4_CLK_SRC					16

#define SCC_QUPV3_SE5_CLK					17

#define SCC_QUPV3_SE5_CLK_SRC					18



#endif