Loading arch/arm64/boot/dts/qcom/atoll.dtsi +14 −0 Original line number Diff line number Diff line Loading @@ -999,6 +999,20 @@ 0x10100 0x10100 0x25900 0x25900>; }; eud: qcom,msm-eud@88e0000 { compatible = "qcom,msm-eud"; interrupt-names = "eud_irq"; interrupts = <GIC_SPI 492 IRQ_TYPE_LEVEL_HIGH>; reg = <0x88e0000 0x2000>, <0x88e2000 0x1000>; reg-names = "eud_base", "eud_mode_mgr2"; qcom,secure-eud-en; qcom,eud-clock-vote-req; clocks = <&clock_gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>; clock-names = "eud_ahb2phy_clk"; status = "ok"; }; qcom,chd_sliver { compatible = "qcom,core-hang-detect"; label = "silver"; Loading Loading
arch/arm64/boot/dts/qcom/atoll.dtsi +14 −0 Original line number Diff line number Diff line Loading @@ -999,6 +999,20 @@ 0x10100 0x10100 0x25900 0x25900>; }; eud: qcom,msm-eud@88e0000 { compatible = "qcom,msm-eud"; interrupt-names = "eud_irq"; interrupts = <GIC_SPI 492 IRQ_TYPE_LEVEL_HIGH>; reg = <0x88e0000 0x2000>, <0x88e2000 0x1000>; reg-names = "eud_base", "eud_mode_mgr2"; qcom,secure-eud-en; qcom,eud-clock-vote-req; clocks = <&clock_gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>; clock-names = "eud_ahb2phy_clk"; status = "ok"; }; qcom,chd_sliver { compatible = "qcom,core-hang-detect"; label = "silver"; Loading