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Commit 5d7b8467 authored by Linus Walleij's avatar Linus Walleij
Browse files

mach-ux500: config Ux500 PL011 PL022 PL180 for DMA



This will configure the platform data for the PL011, PL022
and PL180 (derivate) PrimeCells found in the Ux500 to use DMA
with the generic DMA engine for DMA40.

Signed-off-by: default avatarPer Forlin <per.forlin@linaro.org>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent ec8f1253
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+77 −0
Original line number Original line Diff line number Diff line
@@ -13,12 +13,14 @@
#include <linux/platform_device.h>
#include <linux/platform_device.h>


#include <plat/pincfg.h>
#include <plat/pincfg.h>
#include <plat/ste_dma40.h>
#include <mach/devices.h>
#include <mach/devices.h>
#include <mach/hardware.h>
#include <mach/hardware.h>


#include "devices-db8500.h"
#include "devices-db8500.h"
#include "pins-db8500.h"
#include "pins-db8500.h"
#include "board-mop500.h"
#include "board-mop500.h"
#include "ste-dma40-db8500.h"


static pin_cfg_t mop500_sdi_pins[] = {
static pin_cfg_t mop500_sdi_pins[] = {
	/* SDI0 (MicroSD slot) */
	/* SDI0 (MicroSD slot) */
@@ -86,6 +88,26 @@ static u32 mop500_sdi0_vdd_handler(struct device *dev, unsigned int vdd,
	       MCI_DATA2DIREN | MCI_DATA31DIREN;
	       MCI_DATA2DIREN | MCI_DATA31DIREN;
}
}


#ifdef CONFIG_STE_DMA40
struct stedma40_chan_cfg mop500_sdi0_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type = DB8500_DMA_DEV29_SD_MM0_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_WORD_WIDTH,
	.dst_info.data_width = STEDMA40_WORD_WIDTH,
};

static struct stedma40_chan_cfg mop500_sdi0_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV29_SD_MM0_TX,
	.src_info.data_width = STEDMA40_WORD_WIDTH,
	.dst_info.data_width = STEDMA40_WORD_WIDTH,
};
#endif

static struct mmci_platform_data mop500_sdi0_data = {
static struct mmci_platform_data mop500_sdi0_data = {
	.vdd_handler	= mop500_sdi0_vdd_handler,
	.vdd_handler	= mop500_sdi0_vdd_handler,
	.ocr_mask	= MMC_VDD_29_30,
	.ocr_mask	= MMC_VDD_29_30,
@@ -93,6 +115,11 @@ static struct mmci_platform_data mop500_sdi0_data = {
	.capabilities	= MMC_CAP_4_BIT_DATA,
	.capabilities	= MMC_CAP_4_BIT_DATA,
	.gpio_cd	= GPIO_SDMMC_CD,
	.gpio_cd	= GPIO_SDMMC_CD,
	.gpio_wp	= -1,
	.gpio_wp	= -1,
#ifdef CONFIG_STE_DMA40
	.dma_filter	= stedma40_filter,
	.dma_rx_param	= &mop500_sdi0_dma_cfg_rx,
	.dma_tx_param	= &mop500_sdi0_dma_cfg_tx,
#endif
};
};


void mop500_sdi_tc35892_init(void)
void mop500_sdi_tc35892_init(void)
@@ -116,18 +143,63 @@ void mop500_sdi_tc35892_init(void)
 * SDI 2 (POP eMMC, not on DB8500ed)
 * SDI 2 (POP eMMC, not on DB8500ed)
 */
 */


#ifdef CONFIG_STE_DMA40
struct stedma40_chan_cfg mop500_sdi2_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV28_SD_MM2_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_WORD_WIDTH,
	.dst_info.data_width = STEDMA40_WORD_WIDTH,
};

static struct stedma40_chan_cfg mop500_sdi2_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV28_SD_MM2_TX,
	.src_info.data_width = STEDMA40_WORD_WIDTH,
	.dst_info.data_width = STEDMA40_WORD_WIDTH,
};
#endif

static struct mmci_platform_data mop500_sdi2_data = {
static struct mmci_platform_data mop500_sdi2_data = {
	.ocr_mask	= MMC_VDD_165_195,
	.ocr_mask	= MMC_VDD_165_195,
	.f_max		= 100000000,
	.f_max		= 100000000,
	.capabilities	= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
	.capabilities	= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
	.gpio_cd	= -1,
	.gpio_cd	= -1,
	.gpio_wp	= -1,
	.gpio_wp	= -1,
#ifdef CONFIG_STE_DMA40
	.dma_filter	= stedma40_filter,
	.dma_rx_param	= &mop500_sdi2_dma_cfg_rx,
	.dma_tx_param	= &mop500_sdi2_dma_cfg_tx,
#endif
};
};


/*
/*
 * SDI 4 (on-board eMMC)
 * SDI 4 (on-board eMMC)
 */
 */


#ifdef CONFIG_STE_DMA40
struct stedma40_chan_cfg mop500_sdi4_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV42_SD_MM4_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_WORD_WIDTH,
	.dst_info.data_width = STEDMA40_WORD_WIDTH,
};

static struct stedma40_chan_cfg mop500_sdi4_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV42_SD_MM4_TX,
	.src_info.data_width = STEDMA40_WORD_WIDTH,
	.dst_info.data_width = STEDMA40_WORD_WIDTH,
};
#endif

static struct mmci_platform_data mop500_sdi4_data = {
static struct mmci_platform_data mop500_sdi4_data = {
	.ocr_mask	= MMC_VDD_29_30,
	.ocr_mask	= MMC_VDD_29_30,
	.f_max		= 100000000,
	.f_max		= 100000000,
@@ -135,6 +207,11 @@ static struct mmci_platform_data mop500_sdi4_data = {
			  MMC_CAP_MMC_HIGHSPEED,
			  MMC_CAP_MMC_HIGHSPEED,
	.gpio_cd	= -1,
	.gpio_cd	= -1,
	.gpio_wp	= -1,
	.gpio_wp	= -1,
#ifdef CONFIG_STE_DMA40
	.dma_filter	= stedma40_filter,
	.dma_rx_param	= &mop500_sdi4_dma_cfg_rx,
	.dma_tx_param	= &mop500_sdi4_dma_cfg_tx,
#endif
};
};


void __init mop500_sdi_init(void)
void __init mop500_sdi_init(void)
+122 −13
Original line number Original line Diff line number Diff line
@@ -17,6 +17,7 @@
#include <linux/gpio.h>
#include <linux/gpio.h>
#include <linux/amba/bus.h>
#include <linux/amba/bus.h>
#include <linux/amba/pl022.h>
#include <linux/amba/pl022.h>
#include <linux/amba/serial.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi.h>
#include <linux/mfd/ab8500.h>
#include <linux/mfd/ab8500.h>
#include <linux/mfd/tc3589x.h>
#include <linux/mfd/tc3589x.h>
@@ -29,12 +30,14 @@


#include <plat/pincfg.h>
#include <plat/pincfg.h>
#include <plat/i2c.h>
#include <plat/i2c.h>
#include <plat/ste_dma40.h>


#include <mach/hardware.h>
#include <mach/hardware.h>
#include <mach/setup.h>
#include <mach/setup.h>
#include <mach/devices.h>
#include <mach/devices.h>
#include <mach/irqs.h>
#include <mach/irqs.h>


#include "ste-dma40-db8500.h"
#include "devices-db8500.h"
#include "devices-db8500.h"
#include "pins-db8500.h"
#include "pins-db8500.h"
#include "board-mop500.h"
#include "board-mop500.h"
@@ -123,16 +126,6 @@ struct platform_device ab8500_device = {
	.resource = ab8500_resources,
	.resource = ab8500_resources,
};
};


static struct pl022_ssp_controller ssp0_platform_data = {
	.bus_id = 0,
	/* pl022 not yet supports dma */
	.enable_dma = 0,
	/* on this platform, gpio 31,142,144,214 &
	 * 224 are connected as chip selects
	 */
	.num_chipselect = 5,
};

/*
/*
 * TC35892
 * TC35892
 */
 */
@@ -319,16 +312,132 @@ static struct platform_device *platform_devs[] __initdata = {
	&mop500_gpio_keys_device,
	&mop500_gpio_keys_device,
};
};


#ifdef CONFIG_STE_DMA40
static struct stedma40_chan_cfg ssp0_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV8_SSP0_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg ssp0_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV8_SSP0_TX,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};
#endif

static struct pl022_ssp_controller ssp0_platform_data = {
	.bus_id = 0,
#ifdef CONFIG_STE_DMA40
	.enable_dma = 1,
	.dma_filter = stedma40_filter,
	.dma_rx_param = &ssp0_dma_cfg_rx,
	.dma_tx_param = &ssp0_dma_cfg_tx,
#else
	.enable_dma = 0,
#endif
	/* on this platform, gpio 31,142,144,214 &
	 * 224 are connected as chip selects
	 */
	.num_chipselect = 5,
};

static void __init mop500_spi_init(void)
static void __init mop500_spi_init(void)
{
{
	db8500_add_ssp0(&ssp0_platform_data);
	db8500_add_ssp0(&ssp0_platform_data);
}
}


#ifdef CONFIG_STE_DMA40
static struct stedma40_chan_cfg uart0_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV13_UART0_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart0_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV13_UART0_TX,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart1_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV12_UART1_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart1_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV12_UART1_TX,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart2_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type =  DB8500_DMA_DEV11_UART2_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};

static struct stedma40_chan_cfg uart2_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB8500_DMA_DEV11_UART2_TX,
	.src_info.data_width = STEDMA40_BYTE_WIDTH,
	.dst_info.data_width = STEDMA40_BYTE_WIDTH,
};
#endif

static struct amba_pl011_data uart0_plat = {
#ifdef CONFIG_STE_DMA40
	.dma_filter = stedma40_filter,
	.dma_rx_param = &uart0_dma_cfg_rx,
	.dma_tx_param = &uart0_dma_cfg_tx,
#endif
};

static struct amba_pl011_data uart1_plat = {
#ifdef CONFIG_STE_DMA40
	.dma_filter = stedma40_filter,
	.dma_rx_param = &uart1_dma_cfg_rx,
	.dma_tx_param = &uart1_dma_cfg_tx,
#endif
};

static struct amba_pl011_data uart2_plat = {
#ifdef CONFIG_STE_DMA40
	.dma_filter = stedma40_filter,
	.dma_rx_param = &uart2_dma_cfg_rx,
	.dma_tx_param = &uart2_dma_cfg_tx,
#endif
};

static void __init mop500_uart_init(void)
static void __init mop500_uart_init(void)
{
{
	db8500_add_uart0();
	db8500_add_uart0(&uart0_plat);
	db8500_add_uart1();
	db8500_add_uart1(&uart1_plat);
	db8500_add_uart2();
	db8500_add_uart2(&uart2_plat);
}
}


static void __init u8500_init_machine(void)
static void __init u8500_init_machine(void)
+25 −0
Original line number Original line Diff line number Diff line
@@ -31,6 +31,26 @@ static pin_cfg_t u5500_sdi_pins[] = {
	GPIO14_MC0_CLK		| PIN_DIR_OUTPUT | PIN_VAL_LOW,
	GPIO14_MC0_CLK		| PIN_DIR_OUTPUT | PIN_VAL_LOW,
};
};


#ifdef CONFIG_STE_DMA40
struct stedma40_chan_cfg u5500_sdi0_dma_cfg_rx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_PERIPH_TO_MEM,
	.src_dev_type = DB5500_DMA_DEV24_SDMMC0_RX,
	.dst_dev_type = STEDMA40_DEV_DST_MEMORY,
	.src_info.data_width = STEDMA40_WORD_WIDTH,
	.dst_info.data_width = STEDMA40_WORD_WIDTH,
};

static struct stedma40_chan_cfg u5500_sdi0_dma_cfg_tx = {
	.mode = STEDMA40_MODE_LOGICAL,
	.dir = STEDMA40_MEM_TO_PERIPH,
	.src_dev_type = STEDMA40_DEV_SRC_MEMORY,
	.dst_dev_type = DB5500_DMA_DEV24_SDMMC0_TX,
	.src_info.data_width = STEDMA40_WORD_WIDTH,
	.dst_info.data_width = STEDMA40_WORD_WIDTH,
};
#endif

static struct mmci_platform_data u5500_sdi0_data = {
static struct mmci_platform_data u5500_sdi0_data = {
	.ocr_mask	= MMC_VDD_165_195,
	.ocr_mask	= MMC_VDD_165_195,
	.f_max		= 50000000,
	.f_max		= 50000000,
@@ -39,6 +59,11 @@ static struct mmci_platform_data u5500_sdi0_data = {
				MMC_CAP_MMC_HIGHSPEED,
				MMC_CAP_MMC_HIGHSPEED,
	.gpio_cd	= -1,
	.gpio_cd	= -1,
	.gpio_wp	= -1,
	.gpio_wp	= -1,
#ifdef CONFIG_STE_DMA40
	.dma_filter	= stedma40_filter,
	.dma_rx_param	= &u5500_sdi0_dma_cfg_rx,
	.dma_tx_param	= &u5500_sdi0_dma_cfg_tx,
#endif
};
};


void __init u5500_sdi_init(void)
void __init u5500_sdi_init(void)
+3 −3
Original line number Original line Diff line number Diff line
@@ -22,9 +22,9 @@


static void __init u5500_uart_init(void)
static void __init u5500_uart_init(void)
{
{
	db5500_add_uart0();
	db5500_add_uart0(NULL);
	db5500_add_uart1();
	db5500_add_uart1(NULL);
	db5500_add_uart2();
	db5500_add_uart2(NULL);
}
}


static void __init u5500_init_machine(void)
static void __init u5500_init_machine(void)
+5 −2
Original line number Original line Diff line number Diff line
@@ -42,10 +42,13 @@ dbx500_add_sdi(const char *name, resource_size_t base, int irq,
	return dbx500_add_amba_device(name, base, irq, pdata, 0);
	return dbx500_add_amba_device(name, base, irq, pdata, 0);
}
}


struct amba_pl011_data;

static inline struct amba_device *
static inline struct amba_device *
dbx500_add_uart(const char *name, resource_size_t base, int irq)
dbx500_add_uart(const char *name, resource_size_t base, int irq,
		struct amba_pl011_data *pdata)
{
{
	return dbx500_add_amba_device(name, base, irq, NULL, 0);
	return dbx500_add_amba_device(name, base, irq, pdata, 0);
}
}


struct nmk_i2c_controller;
struct nmk_i2c_controller;
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