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Commit 5cc0d81d authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add the clock nodes for SM8150 v2"

parents 99f4187f a85718ff

Documentation/devicetree/bindings/clock/qcom,camcc.txt

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@@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding 
-------------------------------------------------------------------



Required properties :

- compatible : must contain "qcom,camcc-sm8150" or "qcom,camcc-sdmshrike".

- compatible : must contain "qcom,camcc-sm8150", "qcom,camcc-sm8150-v2"

	       or "qcom,camcc-sdmshrike".

- reg : shall contain base register location and length.

- reg-names: names of registers listed in the same order as in

	     the reg property.

Documentation/devicetree/bindings/clock/qcom,dispcc.txt

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Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ Qualcomm Technologies, Inc. Display Clock & Reset Controller Binding 
--------------------------------------------------------------------



Required properties :

- compatible : Shall contain "qcom,dispcc-sm8150".

- compatible : Shall contain "qcom,dispcc-sm8150" or "qcom,dispcc-sm8150-v2".

- reg : Shall contain base register location and length.

- reg-names: Address name. Must be "cc_base".

- vdd_mm-supply: phandle to the MM_CX rail that needs to be voted on behalf

Documentation/devicetree/bindings/clock/qcom,gcc.txt

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@@ -19,6 +19,7 @@ Required properties : 
			"qcom,gcc-msm8996"

			"qcom,gcc-mdm9615"

			"qcom,gcc-sm8150"

			"qcom,gcc-sm8150-v2"

			"qcom,gcc-sdmshrike"

			"qcom,gcc-qcs405"

			"qcom,gcc-mdss-qcs405"

Documentation/devicetree/bindings/clock/qcom,npucc.txt

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Original line number Diff line number Diff line
@@ -2,7 +2,7 @@ Qualcomm Technologies, Inc. NPU Clock & Reset Controller Binding 
----------------------------------------------------------------



Required properties :

- compatible : must contain "qcom,npucc-sm8150".

- compatible : must contain "qcom,npucc-sm8150" or "qcom,npucc-sm8150-v2".

- reg : shall contain base register location and length.

- reg-names: names of registers listed in the same order as in

	     the reg property.

Documentation/devicetree/bindings/clock/qcom,videocc.txt

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Original line number Diff line number Diff line 
Qualcomm Technologies, Inc. Video Clock & Reset Controller Bindings



Required properties:

- compatible: shall contain "qcom,videocc-sm8150".

- compatible: shall contain "qcom,videocc-sm8150" or "qcom,videocc-sm8150-v2".

- reg: shall contain base register location and length.

- reg-names: names of registers listed in the same order as in the reg property.

- vdd_mm-supply: the logic rail supply.