x86, VisWS: turn into generic arch, use generic mpparse code (5ab74722) · Commits · e / devices / android_kernel_oneplus_sm8150

arch/x86/Kconfig

+2 −2

Original line number	Diff line number	Diff line
		@@ -238,7 +238,7 @@ if ACPI
		config X86_MPPARSE
		def_bool y
		bool "Enable MPS table"
		depends on X86_LOCAL_APIC && !X86_VISWS
		depends on X86_LOCAL_APIC
		help
		For old smp systems that do not have proper acpi support. Newer systems
		(esp with 64bit cpus) with acpi support, MADT and DSDT will override it
		@@ -247,7 +247,7 @@ endif
		if !ACPI
		config X86_MPPARSE
		def_bool y
		depends on X86_LOCAL_APIC && !X86_VISWS
		depends on X86_LOCAL_APIC
		endif

		choice

arch/x86/mach-visws/Makefile

+0 −1

Original line number	Diff line number	Diff line
		@@ -5,4 +5,3 @@
		obj-y := setup.o setup_visws.o traps.o

		obj-$(CONFIG_X86_VISWS_APIC) += visws_apic.o
		obj-$(CONFIG_X86_LOCAL_APIC) += mpparse.o

arch/x86/mach-visws/mpparse.c

deleted100644 → 0

+0 −85

Original line number	Diff line number	Diff line

		#include <linux/init.h>
		#include <linux/smp.h>

		#include <asm/smp.h>
		#include <asm/io.h>

		#include "cobalt.h"
		#include "mach_apic.h"

		extern unsigned int __cpuinitdata maxcpus;

		/*
		* The Visual Workstation is Intel MP compliant in the hardware
		* sense, but it doesn't have a BIOS(-configuration table).
		* No problem for Linux.
		*/

		static void __init MP_processor_info (struct mpc_config_processor *m)
		{
		int ver, logical_apicid;
		physid_mask_t apic_cpus;

		if (!(m->mpc_cpuflag & CPU_ENABLED))
		return;

		logical_apicid = m->mpc_apicid;
		printk(KERN_INFO "%sCPU #%d %u:%u APIC version %d\n",
		m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
		m->mpc_apicid,
		(m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
		(m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
		m->mpc_apicver);

		if (m->mpc_cpuflag & CPU_BOOTPROCESSOR)
		boot_cpu_physical_apicid = m->mpc_apicid;

		ver = m->mpc_apicver;
		if ((ver >= 0x14 && m->mpc_apicid >= 0xff) \|\| m->mpc_apicid >= 0xf) {
		printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
		m->mpc_apicid, MAX_APICS);
		return;
		}

		apic_cpus = apicid_to_cpu_present(m->mpc_apicid);
		physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
		/*
		* Validate version
		*/
		if (ver == 0x0) {
		printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
		"fixing up to 0x10. (tell your hw vendor)\n",
		m->mpc_apicid);
		ver = 0x10;
		}
		apic_version[m->mpc_apicid] = ver;
		}

		void __init find_smp_config(void)
		{
		struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
		unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));

		if (ncpus > CO_CPU_MAX) {
		printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
		ncpus, mp);

		ncpus = CO_CPU_MAX;
		}

		if (ncpus > maxcpus)
		ncpus = maxcpus;

		#ifdef CONFIG_X86_LOCAL_APIC
		smp_found_config = 1;
		#endif
		while (ncpus--)
		MP_processor_info(mp++);

		mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;
		}

		void __init get_smp_config (void)
		{
		}

arch/x86/mach-visws/setup_visws.c

+100 −7

Original line number	Diff line number	Diff line
		@@ -13,12 +13,17 @@
		#include <asm/reboot.h>
		#include <asm/setup.h>
		#include <asm/e820.h>
		#include <asm/smp.h>
		#include <asm/io.h>

		#include <mach_ipi.h>

		#include "cobalt.h"
		#include "piix4.h"
		#include "mach_apic.h"

		#include <linux/init.h>
		#include <linux/smp.h>

		char visws_board_type = -1;
		char visws_board_rev = -1;
		@@ -126,6 +131,88 @@ static void visws_machine_power_off(void)
		outl(PIIX_SPECIAL_STOP, 0xCFC);
		}

		static int __init visws_get_smp_config_quirk(unsigned int early)
		{
		/*
		* Prevent MP-table parsing by the generic code:
		*/
		return 1;
		}

		extern unsigned int __cpuinitdata maxcpus;

		/*
		* The Visual Workstation is Intel MP compliant in the hardware
		* sense, but it doesn't have a BIOS(-configuration table).
		* No problem for Linux.
		*/

		static void __init MP_processor_info (struct mpc_config_processor *m)
		{
		int ver, logical_apicid;
		physid_mask_t apic_cpus;

		if (!(m->mpc_cpuflag & CPU_ENABLED))
		return;

		logical_apicid = m->mpc_apicid;
		printk(KERN_INFO "%sCPU #%d %u:%u APIC version %d\n",
		m->mpc_cpuflag & CPU_BOOTPROCESSOR ? "Bootup " : "",
		m->mpc_apicid,
		(m->mpc_cpufeature & CPU_FAMILY_MASK) >> 8,
		(m->mpc_cpufeature & CPU_MODEL_MASK) >> 4,
		m->mpc_apicver);

		if (m->mpc_cpuflag & CPU_BOOTPROCESSOR)
		boot_cpu_physical_apicid = m->mpc_apicid;

		ver = m->mpc_apicver;
		if ((ver >= 0x14 && m->mpc_apicid >= 0xff) \|\| m->mpc_apicid >= 0xf) {
		printk(KERN_ERR "Processor #%d INVALID. (Max ID: %d).\n",
		m->mpc_apicid, MAX_APICS);
		return;
		}

		apic_cpus = apicid_to_cpu_present(m->mpc_apicid);
		physids_or(phys_cpu_present_map, phys_cpu_present_map, apic_cpus);
		/*
		* Validate version
		*/
		if (ver == 0x0) {
		printk(KERN_ERR "BIOS bug, APIC version is 0 for CPU#%d! "
		"fixing up to 0x10. (tell your hw vendor)\n",
		m->mpc_apicid);
		ver = 0x10;
		}
		apic_version[m->mpc_apicid] = ver;
		}

		int __init visws_find_smp_config_quirk(unsigned int reserve)
		{
		struct mpc_config_processor *mp = phys_to_virt(CO_CPU_TAB_PHYS);
		unsigned short ncpus = readw(phys_to_virt(CO_CPU_NUM_PHYS));

		if (ncpus > CO_CPU_MAX) {
		printk(KERN_WARNING "find_visws_smp: got cpu count of %d at %p\n",
		ncpus, mp);

		ncpus = CO_CPU_MAX;
		}

		if (ncpus > maxcpus)
		ncpus = maxcpus;

		#ifdef CONFIG_X86_LOCAL_APIC
		smp_found_config = 1;
		#endif
		while (ncpus--)
		MP_processor_info(mp++);

		mp_lapic_addr = APIC_DEFAULT_PHYS_BASE;

		return 1;
		}

		extern int visws_trap_init_quirk(void);

		void __init visws_early_detect(void)
		@@ -162,6 +249,12 @@ void __init visws_early_detect(void)
		*/
		no_broadcast = 0;

		/*
		* Override generic MP-table parsing:
		*/
		mach_get_smp_config_quirk = visws_get_smp_config_quirk;
		mach_find_smp_config_quirk = visws_find_smp_config_quirk;

		/*
		* Get Board rev.
		* First, we have to initialize the 307 part to allow us access