Loading drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c +2 −6 Original line number Diff line number Diff line Loading @@ -247,12 +247,8 @@ void sde_encoder_phys_setup_cdm(struct sde_encoder_phys *phys_enc, } } /* setup which pp blk will connect to this cdm */ if (hw_pp && hw_cdm->ops.bind_pingpong_blk) hw_cdm->ops.bind_pingpong_blk(hw_cdm, true, hw_pp->idx); if (hw_cdm && hw_cdm->ops.enable) { if (hw_cdm && hw_pp && hw_cdm->ops.enable) { cdm_cfg->pp_id = hw_pp->idx; ret = hw_cdm->ops.enable(hw_cdm, cdm_cfg); if (ret < 0) { SDE_ERROR("failed to enable CDM %d\n", ret); Loading drivers/gpu/drm/msm/sde/sde_hw_cdm.c +15 −3 Original line number Diff line number Diff line Loading @@ -228,6 +228,9 @@ int sde_hw_cdm_enable(struct sde_hw_cdm *ctx, u32 opmode = 0; u32 csc = 0; if (!ctx || !cdm) return -EINVAL; if (!SDE_FORMAT_IS_YUV(fmt)) return -EINVAL; Loading @@ -246,7 +249,10 @@ int sde_hw_cdm_enable(struct sde_hw_cdm *ctx, csc &= ~BIT(1); csc |= BIT(0); if (ctx->hw_mdp && ctx->hw_mdp->ops.setup_cdm_output) if (ctx && ctx->ops.bind_pingpong_blk) ctx->ops.bind_pingpong_blk(ctx, true, cdm->pp_id); else if (ctx->hw_mdp && ctx->hw_mdp->ops.setup_cdm_output) ctx->hw_mdp->ops.setup_cdm_output(ctx->hw_mdp, &cdm_cfg); SDE_REG_WRITE(c, CDM_CSC_10_OPMODE, csc); Loading @@ -258,7 +264,12 @@ void sde_hw_cdm_disable(struct sde_hw_cdm *ctx) { struct cdm_output_cfg cdm_cfg = { 0 }; if (ctx->hw_mdp && ctx->hw_mdp->ops.setup_cdm_output) if (!ctx) return; if (ctx && ctx->ops.bind_pingpong_blk) ctx->ops.bind_pingpong_blk(ctx, false, 0); else if (ctx->hw_mdp && ctx->hw_mdp->ops.setup_cdm_output) ctx->hw_mdp->ops.setup_cdm_output(ctx->hw_mdp, &cdm_cfg); } Loading @@ -270,10 +281,11 @@ static void sde_hw_cdm_bind_pingpong_blk( struct sde_hw_blk_reg_map *c; int mux_cfg = 0xF; if (!ctx) if (!ctx || (enable && (pp < PINGPONG_0 || pp >= PINGPONG_MAX))) return; c = &ctx->hw; if (enable) mux_cfg = (pp - PINGPONG_0) & 0x7; Loading drivers/gpu/drm/msm/sde/sde_hw_cdm.h +1 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,7 @@ struct sde_hw_cdm_cfg { const struct sde_format *output_fmt; u32 output_type; int flags; int pp_id; }; enum sde_hw_cdwn_type { Loading Loading
drivers/gpu/drm/msm/sde/sde_encoder_phys_wb.c +2 −6 Original line number Diff line number Diff line Loading @@ -247,12 +247,8 @@ void sde_encoder_phys_setup_cdm(struct sde_encoder_phys *phys_enc, } } /* setup which pp blk will connect to this cdm */ if (hw_pp && hw_cdm->ops.bind_pingpong_blk) hw_cdm->ops.bind_pingpong_blk(hw_cdm, true, hw_pp->idx); if (hw_cdm && hw_cdm->ops.enable) { if (hw_cdm && hw_pp && hw_cdm->ops.enable) { cdm_cfg->pp_id = hw_pp->idx; ret = hw_cdm->ops.enable(hw_cdm, cdm_cfg); if (ret < 0) { SDE_ERROR("failed to enable CDM %d\n", ret); Loading
drivers/gpu/drm/msm/sde/sde_hw_cdm.c +15 −3 Original line number Diff line number Diff line Loading @@ -228,6 +228,9 @@ int sde_hw_cdm_enable(struct sde_hw_cdm *ctx, u32 opmode = 0; u32 csc = 0; if (!ctx || !cdm) return -EINVAL; if (!SDE_FORMAT_IS_YUV(fmt)) return -EINVAL; Loading @@ -246,7 +249,10 @@ int sde_hw_cdm_enable(struct sde_hw_cdm *ctx, csc &= ~BIT(1); csc |= BIT(0); if (ctx->hw_mdp && ctx->hw_mdp->ops.setup_cdm_output) if (ctx && ctx->ops.bind_pingpong_blk) ctx->ops.bind_pingpong_blk(ctx, true, cdm->pp_id); else if (ctx->hw_mdp && ctx->hw_mdp->ops.setup_cdm_output) ctx->hw_mdp->ops.setup_cdm_output(ctx->hw_mdp, &cdm_cfg); SDE_REG_WRITE(c, CDM_CSC_10_OPMODE, csc); Loading @@ -258,7 +264,12 @@ void sde_hw_cdm_disable(struct sde_hw_cdm *ctx) { struct cdm_output_cfg cdm_cfg = { 0 }; if (ctx->hw_mdp && ctx->hw_mdp->ops.setup_cdm_output) if (!ctx) return; if (ctx && ctx->ops.bind_pingpong_blk) ctx->ops.bind_pingpong_blk(ctx, false, 0); else if (ctx->hw_mdp && ctx->hw_mdp->ops.setup_cdm_output) ctx->hw_mdp->ops.setup_cdm_output(ctx->hw_mdp, &cdm_cfg); } Loading @@ -270,10 +281,11 @@ static void sde_hw_cdm_bind_pingpong_blk( struct sde_hw_blk_reg_map *c; int mux_cfg = 0xF; if (!ctx) if (!ctx || (enable && (pp < PINGPONG_0 || pp >= PINGPONG_MAX))) return; c = &ctx->hw; if (enable) mux_cfg = (pp - PINGPONG_0) & 0x7; Loading
drivers/gpu/drm/msm/sde/sde_hw_cdm.h +1 −0 Original line number Diff line number Diff line Loading @@ -28,6 +28,7 @@ struct sde_hw_cdm_cfg { const struct sde_format *output_fmt; u32 output_type; int flags; int pp_id; }; enum sde_hw_cdwn_type { Loading