power: smb5: Fix ITERM thresholds configuration

The registers CHGR_ADC_ITERM_UP_THD_MSB and CHGR_ADC_ITERM_LO_THD_MSB
(and their corresponding lower halves, *_LSB) are in big-endian format.
Write to, and read from, these registers in the big-endian format.

CRs-Fixed: 2264651
Change-Id: I16f31f411e865b6bbfe1e299fe8e9e2aff50b536
Signed-off-by: Guru Das Srinagesh <gurus@codeaurora.org>