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Commit 598e74f3 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/jkirsher/net-next 



Jeff Kirsher says:

====================
This series contains updates to ixgbe only.  Only change to this series
is I dropped the "ixgbe: Add support for pipeline reset" due to
change requested by Martin Josefsson.

Alexander Duyck (7):
  ixgbe: Add support for IPv6 and UDP to ixgbe_get_headlen
  ixgbe: Add support for tracking the default user priority to SR-IOV
  ixgbe: Add support for GET_QUEUES message to get DCB configuration
  ixgbe: Enable support for VF API version 1.1 in the PF.
  ixgbevf: Add VF DCB + SR-IOV support
  ixgbe: Drop unnecessary addition from ixgbe_set_rx_buffer_len
  ixgbe: Fix possible memory leak in ixgbe_set_ringparam

Don Skidmore (1):
  ixgbe: Add function ixgbe_reset_pipeline_82599

Emil Tantilov (1):
  ixgbe: add WOL support for new subdevice id

Jacob Keller (1):
  ixgbe: (PTP) refactor init, cyclecounter and reset

Tushar Dave (1):
  ixgbe: Correcting small packet padding

Wei Yongjun (1):
  ixgbe: using is_zero_ether_addr() to simplify the code
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 9f651cac 1f4702aa

drivers/net/ethernet/intel/ixgbe/ixgbe.h

+4 −2
Original line number Diff line number Diff line
@@ -483,7 +483,7 @@ struct ixgbe_adapter { 
#define IXGBE_FLAG2_FDIR_REQUIRES_REINIT        (u32)(1 << 7)

#define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP		(u32)(1 << 8)

#define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP		(u32)(1 << 9)

#define IXGBE_FLAG2_OVERFLOW_CHECK_ENABLED	(u32)(1 << 10)

#define IXGBE_FLAG2_PTP_ENABLED			(u32)(1 << 10)

#define IXGBE_FLAG2_PTP_PPS_ENABLED		(u32)(1 << 11)



	/* Tx fast path data */
@@ -581,7 +581,6 @@ struct ixgbe_adapter { 
	struct timecounter tc;

	int rx_hwtstamp_filter;

	u32 base_incval;

	u32 cycle_speed;

#endif /* CONFIG_IXGBE_PTP */



	/* SR-IOV */
@@ -601,6 +600,8 @@ struct ixgbe_adapter { 
#ifdef CONFIG_DEBUG_FS

	struct dentry *ixgbe_dbg_adapter;

#endif /*CONFIG_DEBUG_FS*/



	u8 default_up;

};



struct ixgbe_fdir_filter {
@@ -752,6 +753,7 @@ extern void ixgbe_ptp_rx_hwtstamp(struct ixgbe_q_vector *q_vector, 
extern int ixgbe_ptp_hwtstamp_ioctl(struct ixgbe_adapter *adapter,

				    struct ifreq *ifr, int cmd);

extern void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter);

extern void ixgbe_ptp_reset(struct ixgbe_adapter *adapter);

extern void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter, u32 eicr);

#endif /* CONFIG_IXGBE_PTP */

drivers/net/ethernet/intel/ixgbe/ixgbe_82599.c

+44 −0
Original line number Diff line number Diff line
@@ -2080,6 +2080,50 @@ static s32 ixgbe_read_eeprom_82599(struct ixgbe_hw *hw, 
	return ret_val;

}



/**

 * ixgbe_reset_pipeline_82599 - perform pipeline reset

 *

 * @hw: pointer to hardware structure

 *

 * Reset pipeline by asserting Restart_AN together with LMS change to ensure

 * full pipeline reset.  Note - We must hold the SW/FW semaphore before writing

 * to AUTOC, so this function assumes the semaphore is held.

 **/

s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw)

{

	s32 i, autoc_reg, ret_val;

	s32 anlp1_reg = 0;



	autoc_reg = IXGBE_READ_REG(hw, IXGBE_AUTOC);

	autoc_reg |= IXGBE_AUTOC_AN_RESTART;



	/* Write AUTOC register with toggled LMS[2] bit and Restart_AN */

	IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg ^ IXGBE_AUTOC_LMS_1G_AN);



	/* Wait for AN to leave state 0 */

	for (i = 0; i < 10; i++) {

		usleep_range(4000, 8000);

		anlp1_reg = IXGBE_READ_REG(hw, IXGBE_ANLP1);

		if (anlp1_reg & IXGBE_ANLP1_AN_STATE_MASK)

			break;

	}



	if (!(anlp1_reg & IXGBE_ANLP1_AN_STATE_MASK)) {

		hw_dbg(hw, "auto negotiation not completed\n");

		ret_val = IXGBE_ERR_RESET_FAILED;

		goto reset_pipeline_out;

	}



	ret_val = 0;



reset_pipeline_out:

	/* Write AUTOC register with original LMS field and Restart_AN */

	IXGBE_WRITE_REG(hw, IXGBE_AUTOC, autoc_reg);

	IXGBE_WRITE_FLUSH(hw);



	return ret_val;

}



static struct ixgbe_mac_operations mac_ops_82599 = {

	.init_hw                = &ixgbe_init_hw_generic,

	.reset_hw               = &ixgbe_reset_hw_82599,

drivers/net/ethernet/intel/ixgbe/ixgbe_common.c

+1 −2
Original line number Diff line number Diff line
@@ -1778,8 +1778,7 @@ s32 ixgbe_validate_mac_addr(u8 *mac_addr) 
	else if (IXGBE_IS_BROADCAST(mac_addr))

		status = IXGBE_ERR_INVALID_MAC_ADDR;

	/* Reject the zero address */

	else if (mac_addr[0] == 0 && mac_addr[1] == 0 && mac_addr[2] == 0 &&

	         mac_addr[3] == 0 && mac_addr[4] == 0 && mac_addr[5] == 0)

	else if (is_zero_ether_addr(mac_addr))

		status = IXGBE_ERR_INVALID_MAC_ADDR;



	return status;

drivers/net/ethernet/intel/ixgbe/ixgbe_common.h

+1 −0
Original line number Diff line number Diff line
@@ -107,6 +107,7 @@ void ixgbe_clear_tx_pending(struct ixgbe_hw *hw); 


void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb,

			     u32 headroom, int strategy);

s32 ixgbe_reset_pipeline_82599(struct ixgbe_hw *hw);



#define IXGBE_I2C_THERMAL_SENSOR_ADDR	0xF8

#define IXGBE_EMC_INTERNAL_DATA		0x00

drivers/net/ethernet/intel/ixgbe/ixgbe_ethtool.c

+50 −52
Original line number Diff line number Diff line
@@ -887,24 +887,23 @@ static int ixgbe_set_ringparam(struct net_device *netdev, 
                               struct ethtool_ringparam *ring)

{

	struct ixgbe_adapter *adapter = netdev_priv(netdev);

	struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;

	struct ixgbe_ring *temp_ring;

	int i, err = 0;

	u32 new_rx_count, new_tx_count;

	bool need_update = false;



	if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))

		return -EINVAL;



	new_rx_count = max_t(u32, ring->rx_pending, IXGBE_MIN_RXD);

	new_rx_count = min_t(u32, new_rx_count, IXGBE_MAX_RXD);

	new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);



	new_tx_count = max_t(u32, ring->tx_pending, IXGBE_MIN_TXD);

	new_tx_count = min_t(u32, new_tx_count, IXGBE_MAX_TXD);

	new_tx_count = clamp_t(u32, ring->tx_pending,

			       IXGBE_MIN_TXD, IXGBE_MAX_TXD);

	new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);



	if ((new_tx_count == adapter->tx_ring[0]->count) &&

	    (new_rx_count == adapter->rx_ring[0]->count)) {

	new_rx_count = clamp_t(u32, ring->rx_pending,

			       IXGBE_MIN_RXD, IXGBE_MAX_RXD);

	new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);



	if ((new_tx_count == adapter->tx_ring_count) &&

	    (new_rx_count == adapter->rx_ring_count)) {

		/* nothing to do */

		return 0;

	}
@@ -922,81 +921,80 @@ static int ixgbe_set_ringparam(struct net_device *netdev, 
		goto clear_reset;

	}



	temp_tx_ring = vmalloc(adapter->num_tx_queues * sizeof(struct ixgbe_ring));

	if (!temp_tx_ring) {

	/* allocate temporary buffer to store rings in */

	i = max_t(int, adapter->num_tx_queues, adapter->num_rx_queues);

	temp_ring = vmalloc(i * sizeof(struct ixgbe_ring));



	if (!temp_ring) {

		err = -ENOMEM;

		goto clear_reset;

	}



	ixgbe_down(adapter);



	/*

	 * Setup new Tx resources and free the old Tx resources in that order.

	 * We can then assign the new resources to the rings via a memcpy.

	 * The advantage to this approach is that we are guaranteed to still

	 * have resources even in the case of an allocation failure.

	 */

	if (new_tx_count != adapter->tx_ring_count) {

		for (i = 0; i < adapter->num_tx_queues; i++) {

			memcpy(&temp_tx_ring[i], adapter->tx_ring[i],

			memcpy(&temp_ring[i], adapter->tx_ring[i],

			       sizeof(struct ixgbe_ring));

			temp_tx_ring[i].count = new_tx_count;

			err = ixgbe_setup_tx_resources(&temp_tx_ring[i]);



			temp_ring[i].count = new_tx_count;

			err = ixgbe_setup_tx_resources(&temp_ring[i]);

			if (err) {

				while (i) {

					i--;

					ixgbe_free_tx_resources(&temp_tx_ring[i]);

					ixgbe_free_tx_resources(&temp_ring[i]);

				}

				goto clear_reset;

				goto err_setup;

			}

		}

		need_update = true;



		for (i = 0; i < adapter->num_tx_queues; i++) {

			ixgbe_free_tx_resources(adapter->tx_ring[i]);



			memcpy(adapter->tx_ring[i], &temp_ring[i],

			       sizeof(struct ixgbe_ring));

		}



	temp_rx_ring = vmalloc(adapter->num_rx_queues * sizeof(struct ixgbe_ring));

	if (!temp_rx_ring) {

		err = -ENOMEM;

		goto err_setup;

		adapter->tx_ring_count = new_tx_count;

	}



	/* Repeat the process for the Rx rings if needed */

	if (new_rx_count != adapter->rx_ring_count) {

		for (i = 0; i < adapter->num_rx_queues; i++) {

			memcpy(&temp_rx_ring[i], adapter->rx_ring[i],

			memcpy(&temp_ring[i], adapter->rx_ring[i],

			       sizeof(struct ixgbe_ring));

			temp_rx_ring[i].count = new_rx_count;

			err = ixgbe_setup_rx_resources(&temp_rx_ring[i]);



			temp_ring[i].count = new_rx_count;

			err = ixgbe_setup_rx_resources(&temp_ring[i]);

			if (err) {

				while (i) {

					i--;

					ixgbe_free_rx_resources(&temp_rx_ring[i]);

					ixgbe_free_rx_resources(&temp_ring[i]);

				}

				goto err_setup;

			}

		}

		need_update = true;

	}



	/* if rings need to be updated, here's the place to do it in one shot */

	if (need_update) {

		ixgbe_down(adapter);



		/* tx */

		if (new_tx_count != adapter->tx_ring_count) {

			for (i = 0; i < adapter->num_tx_queues; i++) {

				ixgbe_free_tx_resources(adapter->tx_ring[i]);

				memcpy(adapter->tx_ring[i], &temp_tx_ring[i],

				       sizeof(struct ixgbe_ring));

			}

			adapter->tx_ring_count = new_tx_count;

		}



		/* rx */

		if (new_rx_count != adapter->rx_ring_count) {

		for (i = 0; i < adapter->num_rx_queues; i++) {

			ixgbe_free_rx_resources(adapter->rx_ring[i]);

				memcpy(adapter->rx_ring[i], &temp_rx_ring[i],



			memcpy(adapter->rx_ring[i], &temp_ring[i],

			       sizeof(struct ixgbe_ring));

		}



		adapter->rx_ring_count = new_rx_count;

	}

		ixgbe_up(adapter);

	}



	vfree(temp_rx_ring);

err_setup:

	vfree(temp_tx_ring);

	ixgbe_up(adapter);

	vfree(temp_ring);

clear_reset:

	clear_bit(__IXGBE_RESETTING, &adapter->state);

	return err;