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Commit 598a08f5 authored by Oleg Perelet's avatar Oleg Perelet Committed by Gerrit - the friendly Code Review server
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msm: kgsl: Sync up gmu idle timeout XO clock 



Add code to synchronize GMU wait for idle loop between
CPU and GMU time stamps.

Signed-off-by: default avatarOleg Perelet <operelet@codeaurora.org>
Change-Id: Ief87e6c7f35b9478d1aaad36746cebd44661d14b
Signed-off-by: default avatarUrvashi Agrawal <urvaagra@codeaurora.org>
parent 03933df3

drivers/gpu/msm/adreno_a6xx.c

+5 −5
Original line number Diff line number Diff line
@@ -2038,17 +2038,17 @@ static int a6xx_wait_for_gmu_idle(struct adreno_device *adreno_dev) 
{

	struct kgsl_device *device = KGSL_DEVICE(adreno_dev);

	struct gmu_device *gmu = &device->gmu;

	unsigned int status, status2;

	unsigned int status2;

	uint64_t ts1;



	ts1 = read_AO_counter(device);

	if (timed_poll_check(device, A6XX_GPU_GMU_AO_GPU_CX_BUSY_STATUS,

			0, GMU_START_TIMEOUT, CXGXCPUBUSYIGNAHB)) {

		kgsl_gmu_regread(device,

				A6XX_GPU_GMU_AO_GPU_CX_BUSY_STATUS, &status);

		kgsl_gmu_regread(device,

				A6XX_GPU_GMU_AO_GPU_CX_BUSY_STATUS2, &status2);

		dev_err(&gmu->pdev->dev,

				"GMU not idling: status=0x%x, status2=0x%x\n",

				status, status2);

				"GMU not idling: status2=0x%x %llx %llx\n",

				status2, ts1, read_AO_counter(device));

		return -ETIMEDOUT;

	}