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Commit 58ba10e2 authored by Taniya Das's avatar Taniya Das
Browse files

ARM: dts: msm: Update the fmax corners for CPU for QCS405 



The Fmax corners for CPU clocks have been updated, so update references to
all cpu fmax corners.

Change-Id: I2cd0636cf8b2f04950fce5e07acf40c0e3263e30
Signed-off-by: default avatarTaniya Das <tdas@codeaurora.org>
parent 74ff3b7b

arch/arm64/boot/dts/qcom/qcs403.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -28,8 +28,8 @@ 
		clocks = <&clock_cpu APCS_MUX_CLK>;



		qcom,cpufreq-table =

			 < 1113600 >,

			 < 1267200 >,

			 < 1094400 >,

			 < 1248000 >,

			 < 1401600 >;

	};
@@ -40,8 +40,8 @@ 
		qcom,cpulist = <&CPU0 &CPU1>;

		qcom,target-dev = <&cpu0_cpu_ddr_latfloor>;

		qcom,core-dev-table =

			< 1113600 MHZ_TO_MBPS( 297, 4) >,

			< 1267200 MHZ_TO_MBPS( 597, 4) >,

			< 1094400 MHZ_TO_MBPS( 297, 4) >,

			< 1248000 MHZ_TO_MBPS( 597, 4) >,

			< 1401600 MHZ_TO_MBPS( 710, 4) >;

	};

};

arch/arm64/boot/dts/qcom/qcs405.dtsi

+6 −6
Original line number Diff line number Diff line
@@ -332,8 +332,8 @@ 
		vdd_hf_pll-supply = <&pms405_l5_ao>;

		qcom,speed0-bin-v0 =

			< 0         0>,

			< 1113600000 1>,

			< 1267200000 2>,

			< 1094400000 1>,

			< 1248000000 2>,

			< 1401600000 3>;

		#clock-cells = <1>;

	};
@@ -1146,8 +1146,8 @@ 
		clocks = <&clock_cpu APCS_MUX_CLK>;



		qcom,cpufreq-table =

			 < 1113600 >,

			 < 1267200 >;

			 < 1094400 >,

			 < 1248000 >;

	};



	ddr_bw_opp_table: ddr-bw-opp-table {
@@ -1187,8 +1187,8 @@ 
		qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;

		qcom,target-dev = <&cpu0_cpu_ddr_latfloor>;

		qcom,core-dev-table =

			< 1113600 MHZ_TO_MBPS( 297, 4) >,

			< 1267200 MHZ_TO_MBPS( 597, 4) >;

			< 1094400 MHZ_TO_MBPS( 297, 4) >,

			< 1248000 MHZ_TO_MBPS( 597, 4) >;

	};



	emac_hw: qcom,emac@07A80000 {