Loading arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -454,7 +454,7 @@ }; &mdss_mdp { connectors = <&sde_wb &sde_dp &sde_dsi>; connectors = <&sde_rscc &sde_wb &sde_dp &sde_dsi>; }; /* PHY TIMINGS REVISION T */ Loading arch/arm64/boot/dts/qcom/sm8150-sde-pll.dtsi +0 −17 Original line number Diff line number Diff line Loading @@ -79,8 +79,6 @@ reg-names = "pll_base", "phy_base", "ln_tx0_base", "ln_tx1_base", "gdsc_base"; gdsc-supply = <&mdss_core_gdsc>; clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_DISP_AHB_CLK>, Loading @@ -89,21 +87,6 @@ clock-names = "iface_clk", "ref_clk_src", "gcc_iface", "ref_clk", "pipe_clk"; clock-rate = <0>; qcom,platform-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "gdsc"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; }; arch/arm64/boot/dts/qcom/sm8150-sde.dtsi +13 −45 Original line number Diff line number Diff line Loading @@ -24,17 +24,20 @@ clocks = <&clock_gcc GCC_DISP_AHB_CLK>, <&clock_gcc GCC_DISP_HF_AXI_CLK>, <&clock_gcc GCC_DISP_SF_AXI_CLK>, <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>, <&clock_dispcc DISP_CC_MDSS_MDP_LUT_CLK>; clock-names = "gcc_iface", "gcc_bus", <&clock_dispcc DISP_CC_MDSS_MDP_LUT_CLK>, <&clock_dispcc DISP_CC_MDSS_ROT_CLK>; clock-names = "gcc_iface", "gcc_bus", "gcc_nrt_bus", "iface_clk", "core_clk", "vsync_clk", "lut_clk"; clock-rate = <0 0 0 300000000 19200000 300000000>; clock-max-rate = <0 0 0 460000000 19200000 460000000>; "lut_clk", "rot_clk"; clock-rate = <0 0 0 0 300000000 19200000 300000000>; clock-max-rate = <0 0 0 0 460000000 19200000 460000000>; sde-vdd-supply = <&mdss_core_gdsc>; mmcx-supply = <&VDD_MMCX_LEVEL>; /* interrupt config */ interrupts = <0 83 0>; Loading Loading @@ -246,7 +249,7 @@ qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "sde-vdd"; qcom,supply-name = "mmcx"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; Loading @@ -261,33 +264,13 @@ /* data and reg bus scale settings */ qcom,sde-data-bus { qcom,msm-bus,name = "mdss_sde_mnoc"; qcom,msm-bus,name = "mdss_sde"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = <22 773 0 0>, <23 773 0 0>, <22 773 0 6400000>, <23 773 0 6400000>, <22 773 0 6400000>, <23 773 0 6400000>; }; qcom,sde-llcc-bus { qcom,msm-bus,name = "mdss_sde_llcc"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <132 770 0 0>, <132 770 0 6400000>, <132 770 0 6400000>; }; qcom,sde-ebi-bus { qcom,msm-bus,name = "mdss_sde_ebi"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <129 512 0 0>, <129 512 0 6400000>, <129 512 0 6400000>; <22 512 0 0>, <23 512 0 0>, <22 512 0 6400000>, <23 512 0 6400000>, <22 512 0 6400000>, <23 512 0 6400000>; }; qcom,sde-reg-bus { Loading @@ -309,7 +292,6 @@ <0xaf30000 0x3fd4>; reg-names = "drv", "wrapper"; qcom,sde-rsc-version = <2>; status = "disabled"; vdd-supply = <&mdss_core_gdsc>; clocks = <&clock_dispcc DISP_CC_MDSS_RSCC_VSYNC_CLK>, Loading Loading @@ -356,20 +338,6 @@ <20000 20512 0 6400000>, <20000 20512 0 6400000>; }; qcom,platform-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "mmcx"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; mdss_rotator: qcom,mdss_rotator@ae00000 { Loading drivers/gpu/drm/msm/sde/sde_crtc.c +150 −0 Original line number Diff line number Diff line Loading @@ -87,6 +87,8 @@ static struct sde_crtc_custom_events custom_events[] = { * Default value is set to 1 sec. */ #define CRTC_TIME_PERIOD_CALC_FPS_US 1000000 #define MAX_PERIODICITY 5000000 #define MAX_FRAME_COUNT 300 static inline struct sde_kms *_sde_crtc_get_kms(struct drm_crtc *crtc) { Loading Loading @@ -163,6 +165,16 @@ static void sde_crtc_calc_fps(struct sde_crtc *sde_crtc) sde_crtc->fps_info.last_sampled_time_us = current_time_us; sde_crtc->fps_info.frame_count = 0; } /** * Array indexing is based on sliding window algorithm. * sde_crtc->time_buf has a maximum capacity of MAX_FRAME_COUNT * time slots. As the count increases to MAX_FRAME_COUNT + 1, the * counter loops around and comes back to the first index to store * the next ktime. */ sde_crtc->time_buf[sde_crtc->next_time_index++] = ktime_get(); sde_crtc->next_time_index %= MAX_FRAME_COUNT; } /** Loading Loading @@ -685,6 +697,131 @@ static int _sde_debugfs_fps_status(struct inode *inode, struct file *file) inode->i_private); } static ssize_t set_fps_periodicity(struct device *device, struct device_attribute *attr, const char *buf, size_t count) { struct drm_crtc *crtc; struct sde_crtc *sde_crtc; int res; if (!device || !buf) { SDE_ERROR("invalid input param(s)\n"); return -EAGAIN; } crtc = dev_get_drvdata(device); if (!crtc) return -EINVAL; sde_crtc = to_sde_crtc(crtc); res = kstrtou32(buf, 10, &sde_crtc->fps_info.fps_periodicity); if (res < 0) return res; if (sde_crtc->fps_info.fps_periodicity < 0 || (sde_crtc->fps_info.fps_periodicity)*1000 > MAX_PERIODICITY) sde_crtc->fps_info.fps_periodicity = CRTC_TIME_PERIOD_CALC_FPS_US; else sde_crtc->fps_info.fps_periodicity *= 1000; return count; } static ssize_t fps_periodicity_show(struct device *device, struct device_attribute *attr, char *buf) { struct drm_crtc *crtc; struct sde_crtc *sde_crtc; if (!device || !buf) { SDE_ERROR("invalid input param(s)\n"); return -EAGAIN; } crtc = dev_get_drvdata(device); if (!crtc) return -EINVAL; sde_crtc = to_sde_crtc(crtc); return scnprintf(buf, PAGE_SIZE, "%d\n", (sde_crtc->fps_info.fps_periodicity)/1000); } static ssize_t measured_fps_show(struct device *device, struct device_attribute *attr, char *buf) { struct drm_crtc *crtc; struct sde_crtc *sde_crtc; unsigned int fps_int, fps_decimal; u64 fps = 0, frame_count = 1; ktime_t current_time; int i = 0, time_index; u64 diff_us; if (!device || !buf) { SDE_ERROR("invalid input param(s)\n"); return -EAGAIN; } crtc = dev_get_drvdata(device); if (!crtc) return -EINVAL; sde_crtc = to_sde_crtc(crtc); /** * Whenever the time_index counter comes to zero upon decrementing, * it is set to the last index since it is the next index that we * should check for calculating the buftime. */ time_index = (sde_crtc->next_time_index - 1) < 0 ? MAX_FRAME_COUNT - 1 : (sde_crtc->next_time_index - 1); current_time = ktime_get(); if (sde_crtc->fps_info.fps_periodicity <= MAX_PERIODICITY) { for (; i < MAX_FRAME_COUNT; i++) { u64 ptime = (u64)ktime_to_us(current_time); u64 buftime = (u64) ktime_to_us(sde_crtc->time_buf[time_index]); if (ptime > buftime) { diff_us = (u64)ktime_us_delta(current_time, sde_crtc->time_buf[time_index]); if (diff_us >= (u64) sde_crtc->fps_info.fps_periodicity) { fps = (frame_count) * 1000000 * 10; do_div(fps, diff_us); sde_crtc->fps_info.measured_fps = (unsigned int)fps; break; } } time_index = (time_index - 1) < 0 ? (MAX_FRAME_COUNT - 1) : (time_index - 1); frame_count++; } } if (i == MAX_FRAME_COUNT) { diff_us = (u64)ktime_us_delta(current_time, sde_crtc->time_buf[time_index]); if (diff_us >= sde_crtc->fps_info.fps_periodicity) { fps = (frame_count) * 1000000 * 10; do_div(fps, diff_us); sde_crtc->fps_info.measured_fps = (unsigned int)fps; } } fps_int = (unsigned int) sde_crtc->fps_info.measured_fps; fps_decimal = do_div(fps_int, 10); return scnprintf(buf, PAGE_SIZE, "%d.%d\n", fps_int, fps_decimal); } static ssize_t vsync_event_show(struct device *device, struct device_attribute *attr, char *buf) { Loading @@ -703,8 +840,13 @@ static ssize_t vsync_event_show(struct device *device, } static DEVICE_ATTR_RO(vsync_event); static DEVICE_ATTR(measured_fps, 0444, measured_fps_show, NULL); static DEVICE_ATTR(fps_periodicity_ms, 0644, fps_periodicity_show, set_fps_periodicity); static struct attribute *sde_crtc_dev_attrs[] = { &dev_attr_vsync_event.attr, &dev_attr_measured_fps.attr, &dev_attr_fps_periodicity_ms.attr, NULL }; Loading Loading @@ -6258,6 +6400,14 @@ struct drm_crtc *sde_crtc_init(struct drm_device *dev, struct drm_plane *plane) sde_crtc->enabled = false; /* Below parameters are for fps calculation for sysfs node */ sde_crtc->fps_info.fps_periodicity = CRTC_TIME_PERIOD_CALC_FPS_US; sde_crtc->fps_info.frame_count = 0; sde_crtc->time_buf = kmalloc_array(MAX_FRAME_COUNT, sizeof(sde_crtc->time_buf), GFP_KERNEL); memset(sde_crtc->time_buf, 0, sizeof(*(sde_crtc->time_buf))); sde_crtc->next_time_index = 0; INIT_LIST_HEAD(&sde_crtc->frame_event_list); INIT_LIST_HEAD(&sde_crtc->user_event_list); for (i = 0; i < ARRAY_SIZE(sde_crtc->frame_events); i++) { Loading drivers/gpu/drm/msm/sde/sde_crtc.h +3 −0 Original line number Diff line number Diff line Loading @@ -148,6 +148,7 @@ struct sde_crtc_fps_info { u32 frame_count; ktime_t last_sampled_time_us; u32 measured_fps; u32 fps_periodicity; }; /* Loading Loading @@ -241,6 +242,7 @@ struct sde_crtc { u64 play_count; ktime_t vblank_cb_time; ktime_t vblank_last_cb_time; ktime_t *time_buf; struct sde_crtc_fps_info fps_info; struct device *sysfs_dev; struct kernfs_node *vsync_event_sf; Loading Loading @@ -287,6 +289,7 @@ struct sde_crtc { struct list_head rp_head; u32 plane_mask_old; u32 next_time_index; /* blob for histogram data */ struct drm_property_blob *hist_blob; Loading Loading
arch/arm64/boot/dts/qcom/sm8150-sde-display.dtsi +1 −1 Original line number Diff line number Diff line Loading @@ -454,7 +454,7 @@ }; &mdss_mdp { connectors = <&sde_wb &sde_dp &sde_dsi>; connectors = <&sde_rscc &sde_wb &sde_dp &sde_dsi>; }; /* PHY TIMINGS REVISION T */ Loading
arch/arm64/boot/dts/qcom/sm8150-sde-pll.dtsi +0 −17 Original line number Diff line number Diff line Loading @@ -79,8 +79,6 @@ reg-names = "pll_base", "phy_base", "ln_tx0_base", "ln_tx1_base", "gdsc_base"; gdsc-supply = <&mdss_core_gdsc>; clocks = <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_DISP_AHB_CLK>, Loading @@ -89,21 +87,6 @@ clock-names = "iface_clk", "ref_clk_src", "gcc_iface", "ref_clk", "pipe_clk"; clock-rate = <0>; qcom,platform-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "gdsc"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; };
arch/arm64/boot/dts/qcom/sm8150-sde.dtsi +13 −45 Original line number Diff line number Diff line Loading @@ -24,17 +24,20 @@ clocks = <&clock_gcc GCC_DISP_AHB_CLK>, <&clock_gcc GCC_DISP_HF_AXI_CLK>, <&clock_gcc GCC_DISP_SF_AXI_CLK>, <&clock_dispcc DISP_CC_MDSS_AHB_CLK>, <&clock_dispcc DISP_CC_MDSS_MDP_CLK>, <&clock_dispcc DISP_CC_MDSS_VSYNC_CLK>, <&clock_dispcc DISP_CC_MDSS_MDP_LUT_CLK>; clock-names = "gcc_iface", "gcc_bus", <&clock_dispcc DISP_CC_MDSS_MDP_LUT_CLK>, <&clock_dispcc DISP_CC_MDSS_ROT_CLK>; clock-names = "gcc_iface", "gcc_bus", "gcc_nrt_bus", "iface_clk", "core_clk", "vsync_clk", "lut_clk"; clock-rate = <0 0 0 300000000 19200000 300000000>; clock-max-rate = <0 0 0 460000000 19200000 460000000>; "lut_clk", "rot_clk"; clock-rate = <0 0 0 0 300000000 19200000 300000000>; clock-max-rate = <0 0 0 0 460000000 19200000 460000000>; sde-vdd-supply = <&mdss_core_gdsc>; mmcx-supply = <&VDD_MMCX_LEVEL>; /* interrupt config */ interrupts = <0 83 0>; Loading Loading @@ -246,7 +249,7 @@ qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "sde-vdd"; qcom,supply-name = "mmcx"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; Loading @@ -261,33 +264,13 @@ /* data and reg bus scale settings */ qcom,sde-data-bus { qcom,msm-bus,name = "mdss_sde_mnoc"; qcom,msm-bus,name = "mdss_sde"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <2>; qcom,msm-bus,vectors-KBps = <22 773 0 0>, <23 773 0 0>, <22 773 0 6400000>, <23 773 0 6400000>, <22 773 0 6400000>, <23 773 0 6400000>; }; qcom,sde-llcc-bus { qcom,msm-bus,name = "mdss_sde_llcc"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <132 770 0 0>, <132 770 0 6400000>, <132 770 0 6400000>; }; qcom,sde-ebi-bus { qcom,msm-bus,name = "mdss_sde_ebi"; qcom,msm-bus,num-cases = <3>; qcom,msm-bus,num-paths = <1>; qcom,msm-bus,vectors-KBps = <129 512 0 0>, <129 512 0 6400000>, <129 512 0 6400000>; <22 512 0 0>, <23 512 0 0>, <22 512 0 6400000>, <23 512 0 6400000>, <22 512 0 6400000>, <23 512 0 6400000>; }; qcom,sde-reg-bus { Loading @@ -309,7 +292,6 @@ <0xaf30000 0x3fd4>; reg-names = "drv", "wrapper"; qcom,sde-rsc-version = <2>; status = "disabled"; vdd-supply = <&mdss_core_gdsc>; clocks = <&clock_dispcc DISP_CC_MDSS_RSCC_VSYNC_CLK>, Loading Loading @@ -356,20 +338,6 @@ <20000 20512 0 6400000>, <20000 20512 0 6400000>; }; qcom,platform-supply-entries { #address-cells = <1>; #size-cells = <0>; qcom,platform-supply-entry@0 { reg = <0>; qcom,supply-name = "mmcx"; qcom,supply-min-voltage = <0>; qcom,supply-max-voltage = <0>; qcom,supply-enable-load = <0>; qcom,supply-disable-load = <0>; }; }; }; mdss_rotator: qcom,mdss_rotator@ae00000 { Loading
drivers/gpu/drm/msm/sde/sde_crtc.c +150 −0 Original line number Diff line number Diff line Loading @@ -87,6 +87,8 @@ static struct sde_crtc_custom_events custom_events[] = { * Default value is set to 1 sec. */ #define CRTC_TIME_PERIOD_CALC_FPS_US 1000000 #define MAX_PERIODICITY 5000000 #define MAX_FRAME_COUNT 300 static inline struct sde_kms *_sde_crtc_get_kms(struct drm_crtc *crtc) { Loading Loading @@ -163,6 +165,16 @@ static void sde_crtc_calc_fps(struct sde_crtc *sde_crtc) sde_crtc->fps_info.last_sampled_time_us = current_time_us; sde_crtc->fps_info.frame_count = 0; } /** * Array indexing is based on sliding window algorithm. * sde_crtc->time_buf has a maximum capacity of MAX_FRAME_COUNT * time slots. As the count increases to MAX_FRAME_COUNT + 1, the * counter loops around and comes back to the first index to store * the next ktime. */ sde_crtc->time_buf[sde_crtc->next_time_index++] = ktime_get(); sde_crtc->next_time_index %= MAX_FRAME_COUNT; } /** Loading Loading @@ -685,6 +697,131 @@ static int _sde_debugfs_fps_status(struct inode *inode, struct file *file) inode->i_private); } static ssize_t set_fps_periodicity(struct device *device, struct device_attribute *attr, const char *buf, size_t count) { struct drm_crtc *crtc; struct sde_crtc *sde_crtc; int res; if (!device || !buf) { SDE_ERROR("invalid input param(s)\n"); return -EAGAIN; } crtc = dev_get_drvdata(device); if (!crtc) return -EINVAL; sde_crtc = to_sde_crtc(crtc); res = kstrtou32(buf, 10, &sde_crtc->fps_info.fps_periodicity); if (res < 0) return res; if (sde_crtc->fps_info.fps_periodicity < 0 || (sde_crtc->fps_info.fps_periodicity)*1000 > MAX_PERIODICITY) sde_crtc->fps_info.fps_periodicity = CRTC_TIME_PERIOD_CALC_FPS_US; else sde_crtc->fps_info.fps_periodicity *= 1000; return count; } static ssize_t fps_periodicity_show(struct device *device, struct device_attribute *attr, char *buf) { struct drm_crtc *crtc; struct sde_crtc *sde_crtc; if (!device || !buf) { SDE_ERROR("invalid input param(s)\n"); return -EAGAIN; } crtc = dev_get_drvdata(device); if (!crtc) return -EINVAL; sde_crtc = to_sde_crtc(crtc); return scnprintf(buf, PAGE_SIZE, "%d\n", (sde_crtc->fps_info.fps_periodicity)/1000); } static ssize_t measured_fps_show(struct device *device, struct device_attribute *attr, char *buf) { struct drm_crtc *crtc; struct sde_crtc *sde_crtc; unsigned int fps_int, fps_decimal; u64 fps = 0, frame_count = 1; ktime_t current_time; int i = 0, time_index; u64 diff_us; if (!device || !buf) { SDE_ERROR("invalid input param(s)\n"); return -EAGAIN; } crtc = dev_get_drvdata(device); if (!crtc) return -EINVAL; sde_crtc = to_sde_crtc(crtc); /** * Whenever the time_index counter comes to zero upon decrementing, * it is set to the last index since it is the next index that we * should check for calculating the buftime. */ time_index = (sde_crtc->next_time_index - 1) < 0 ? MAX_FRAME_COUNT - 1 : (sde_crtc->next_time_index - 1); current_time = ktime_get(); if (sde_crtc->fps_info.fps_periodicity <= MAX_PERIODICITY) { for (; i < MAX_FRAME_COUNT; i++) { u64 ptime = (u64)ktime_to_us(current_time); u64 buftime = (u64) ktime_to_us(sde_crtc->time_buf[time_index]); if (ptime > buftime) { diff_us = (u64)ktime_us_delta(current_time, sde_crtc->time_buf[time_index]); if (diff_us >= (u64) sde_crtc->fps_info.fps_periodicity) { fps = (frame_count) * 1000000 * 10; do_div(fps, diff_us); sde_crtc->fps_info.measured_fps = (unsigned int)fps; break; } } time_index = (time_index - 1) < 0 ? (MAX_FRAME_COUNT - 1) : (time_index - 1); frame_count++; } } if (i == MAX_FRAME_COUNT) { diff_us = (u64)ktime_us_delta(current_time, sde_crtc->time_buf[time_index]); if (diff_us >= sde_crtc->fps_info.fps_periodicity) { fps = (frame_count) * 1000000 * 10; do_div(fps, diff_us); sde_crtc->fps_info.measured_fps = (unsigned int)fps; } } fps_int = (unsigned int) sde_crtc->fps_info.measured_fps; fps_decimal = do_div(fps_int, 10); return scnprintf(buf, PAGE_SIZE, "%d.%d\n", fps_int, fps_decimal); } static ssize_t vsync_event_show(struct device *device, struct device_attribute *attr, char *buf) { Loading @@ -703,8 +840,13 @@ static ssize_t vsync_event_show(struct device *device, } static DEVICE_ATTR_RO(vsync_event); static DEVICE_ATTR(measured_fps, 0444, measured_fps_show, NULL); static DEVICE_ATTR(fps_periodicity_ms, 0644, fps_periodicity_show, set_fps_periodicity); static struct attribute *sde_crtc_dev_attrs[] = { &dev_attr_vsync_event.attr, &dev_attr_measured_fps.attr, &dev_attr_fps_periodicity_ms.attr, NULL }; Loading Loading @@ -6258,6 +6400,14 @@ struct drm_crtc *sde_crtc_init(struct drm_device *dev, struct drm_plane *plane) sde_crtc->enabled = false; /* Below parameters are for fps calculation for sysfs node */ sde_crtc->fps_info.fps_periodicity = CRTC_TIME_PERIOD_CALC_FPS_US; sde_crtc->fps_info.frame_count = 0; sde_crtc->time_buf = kmalloc_array(MAX_FRAME_COUNT, sizeof(sde_crtc->time_buf), GFP_KERNEL); memset(sde_crtc->time_buf, 0, sizeof(*(sde_crtc->time_buf))); sde_crtc->next_time_index = 0; INIT_LIST_HEAD(&sde_crtc->frame_event_list); INIT_LIST_HEAD(&sde_crtc->user_event_list); for (i = 0; i < ARRAY_SIZE(sde_crtc->frame_events); i++) { Loading
drivers/gpu/drm/msm/sde/sde_crtc.h +3 −0 Original line number Diff line number Diff line Loading @@ -148,6 +148,7 @@ struct sde_crtc_fps_info { u32 frame_count; ktime_t last_sampled_time_us; u32 measured_fps; u32 fps_periodicity; }; /* Loading Loading @@ -241,6 +242,7 @@ struct sde_crtc { u64 play_count; ktime_t vblank_cb_time; ktime_t vblank_last_cb_time; ktime_t *time_buf; struct sde_crtc_fps_info fps_info; struct device *sysfs_dev; struct kernfs_node *vsync_event_sf; Loading Loading @@ -287,6 +289,7 @@ struct sde_crtc { struct list_head rp_head; u32 plane_mask_old; u32 next_time_index; /* blob for histogram data */ struct drm_property_blob *hist_blob; Loading