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Commit 562df5c8 authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branch 'pci/host-designware' into next 

* pci/host-designware:
  PCI: designware: Add driver for prototyping kits based on ARC SDP
  PCI: designware: Add default link up check if sub-driver doesn't override
  PCI: designware: Add generic dw_pcie_wait_for_link()
  ARC: Add PCI support
parents c334f9c8 5a3aa2a8

Documentation/devicetree/bindings/pci/designware-pcie.txt

+17 −0
Original line number Original line Diff line number Diff line
@@ -28,3 +28,20 @@ Optional properties: 
- clock-names: Must include the following entries:

- clock-names: Must include the following entries:

	- "pcie"

	- "pcie"

	- "pcie_bus"

	- "pcie_bus"



Example configuration:



	pcie: pcie@0xdffff000 {

		compatible = "snps,dw-pcie";

		reg = <0xdffff000 0x1000>, /* Controller registers */

		      <0xd0000000 0x2000>; /* PCI config space */

		reg-names = "ctrlreg", "config";

		#address-cells = <3>;

		#size-cells = <2>;

		device_type = "pci";

		ranges = <0x81000000 0 0x00000000 0xde000000 0 0x00010000

			  0x82000000 0 0xd0400000 0xd0400000 0 0x0d000000>;

		interrupts = <25>, <24>;

		#interrupt-cells = <1>;

		num-lanes = <1>;

	};

MAINTAINERS

+7 −0
Original line number Original line Diff line number Diff line
@@ -8367,6 +8367,13 @@ L: linux-pci@vger.kernel.org 
S:	Maintained

S:	Maintained

F:	drivers/pci/host/*designware*

F:	drivers/pci/host/*designware*





PCI DRIVER FOR SYNOPSYS PROTOTYPING DEVICE

M:	Joao Pinto <jpinto@synopsys.com>

L:	linux-pci@vger.kernel.org

S:	Maintained

F:	Documentation/devicetree/bindings/pci/designware-pcie.txt

F:	drivers/pci/host/pcie-designware-plat.c



PCI DRIVER FOR GENERIC OF HOSTS

PCI DRIVER FOR GENERIC OF HOSTS

M:	Will Deacon <will.deacon@arm.com>

M:	Will Deacon <will.deacon@arm.com>

L:	linux-pci@vger.kernel.org

L:	linux-pci@vger.kernel.org

arch/arc/Kconfig

+26 −0
Original line number Original line Diff line number Diff line
@@ -19,6 +19,7 @@ config ARC 
	select GENERIC_FIND_FIRST_BIT

	select GENERIC_FIND_FIRST_BIT

	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP

	# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP

	select GENERIC_IRQ_SHOW

	select GENERIC_IRQ_SHOW

	select GENERIC_PCI_IOMAP

	select GENERIC_PENDING_IRQ if SMP

	select GENERIC_PENDING_IRQ if SMP

	select GENERIC_SMP_IDLE_THREAD

	select GENERIC_SMP_IDLE_THREAD

	select HAVE_ARCH_KGDB

	select HAVE_ARCH_KGDB
@@ -39,6 +40,9 @@ config ARC 
	select PERF_USE_VMALLOC

	select PERF_USE_VMALLOC

	select HAVE_DEBUG_STACKOVERFLOW

	select HAVE_DEBUG_STACKOVERFLOW





config MIGHT_HAVE_PCI

	bool



config TRACE_IRQFLAGS_SUPPORT

config TRACE_IRQFLAGS_SUPPORT

	def_bool y

	def_bool y
@@ -568,6 +572,28 @@ endmenu # "ARC Architecture Configuration" 
source "mm/Kconfig"

source "mm/Kconfig"

source "net/Kconfig"

source "net/Kconfig"

source "drivers/Kconfig"

source "drivers/Kconfig"



menu "Bus Support"



config PCI

	bool "PCI support" if MIGHT_HAVE_PCI

	help

	  PCI is the name of a bus system, i.e., the way the CPU talks to

	  the other stuff inside your box.  Find out if your board/platform

	  has PCI.



	  Note: PCIe support for Synopsys Device will be available only

	  when HAPS DX is configured with PCIe RC bitmap. If you have PCI,

	  say Y, otherwise N.



config PCI_SYSCALL

	def_bool PCI



source "drivers/pci/Kconfig"

source "drivers/pci/pcie/Kconfig"



endmenu



source "fs/Kconfig"

source "fs/Kconfig"

source "arch/arc/Kconfig.debug"

source "arch/arc/Kconfig.debug"

source "security/Kconfig"

source "security/Kconfig"

arch/arc/include/asm/dma.h

+5 −0
Original line number Original line Diff line number Diff line
@@ -10,5 +10,10 @@ 
#define ASM_ARC_DMA_H

#define ASM_ARC_DMA_H





#define MAX_DMA_ADDRESS 0xC0000000

#define MAX_DMA_ADDRESS 0xC0000000

#ifdef CONFIG_PCI

extern int isa_dma_bridge_buggy;

#else

#define isa_dma_bridge_buggy	0

#endif





#endif
 
#endif

arch/arc/include/asm/io.h

+9 −0
Original line number Original line Diff line number Diff line
@@ -16,6 +16,15 @@ 
extern void __iomem *ioremap(unsigned long physaddr, unsigned long size);

extern void __iomem *ioremap(unsigned long physaddr, unsigned long size);

extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,

extern void __iomem *ioremap_prot(phys_addr_t offset, unsigned long size,

				  unsigned long flags);

				  unsigned long flags);

static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)

{

	return (void __iomem *)port;

}



static inline void ioport_unmap(void __iomem *addr)

{

}



extern void iounmap(const void __iomem *addr);

extern void iounmap(const void __iomem *addr);





#define ioremap_nocache(phy, sz)	ioremap(phy, sz)

#define ioremap_nocache(phy, sz)	ioremap(phy, sz)