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Commit 561c5cec authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add NTAG device node for QCS405"

parents 8b761b27 58754e23
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+33 −0
Original line number Diff line number Diff line
@@ -645,6 +645,39 @@
			};
		};

		ntag {
			ntag_int_active: ntag_int_active {
				/* active state */
				mux {
					/* GPIO 53 Field Detect Interrupt */
					pins = "gpio53";
					function = "gpio";
				};

				config {
					pins = "gpio53";
					drive-strength = <2>; /* 2 MA */
					bias-pull-up;
				};
			};

			ntag_int_suspend: ntag_int_suspend {
				/* sleep state */
				mux {
					/* GPIO 53 Field Detect Interrupt */
					pins = "gpio53";
					function = "gpio";
				};

				config {
					pins = "gpio53";
					drive-strength = <2>; /* 2 MA */
					bias-pull-up;
				};
			};

		};

		/* SDC pin type */
		sdc1_clk_on: sdc1_clk_on {
			config {
+16 −0
Original line number Diff line number Diff line
@@ -121,6 +121,22 @@
#include "qcs405-gpu.dtsi"
#include "qcs405-mdss-pll.dtsi"

&i2c_5 { /* BLSP (NTAG) */
	status = "ok";
	nq@55 {
		compatible = "qcom,nq-ntag";
		reg = <0x55>;
		qcom,nq-ntagfd = <&tlmm 53 GPIO_ACTIVE_LOW>;
		interrupt-parent = <&tlmm>;
		interrupts = <53 0>;
		interrupt-names = "ntag_fd";
		pinctrl-names = "ntag_active", "ntag_suspend";
		pinctrl-0 = <&ntag_int_active>;
		pinctrl-1 = <&ntag_int_suspend>;
	};
};


&soc {
	#address-cells = <1>;
	#size-cells = <1>;