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Commit 552e0c4f authored by Sebastian Andrzej Siewior's avatar Sebastian Andrzej Siewior Committed by Greg Kroah-Hartman
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usb/xhci: move xhci_gen_setup() away from -pci. 



xhci_gen_setup() is generic so it can be used to perform the bare xhci
setup even on non-pci based platform. The typedef for the function
pointer is moved into the headerfile

Signed-off-by: default avatarSebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: default avatarSarah Sharp <sarah.a.sharp@linux.intel.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent da3c9c4f

drivers/usb/host/xhci-pci.c

+0 −91
Original line number Diff line number Diff line
@@ -51,97 +51,6 @@ static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev) 
	return 0;

}



typedef void (*xhci_get_quirks_t)(struct device *, struct xhci_hcd *);



static int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)

{

	struct xhci_hcd		*xhci;

	struct device		*dev = hcd->self.controller;

	int			retval;

	u32			temp;



	hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;



	if (usb_hcd_is_primary_hcd(hcd)) {

		xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);

		if (!xhci)

			return -ENOMEM;

		*((struct xhci_hcd **) hcd->hcd_priv) = xhci;

		xhci->main_hcd = hcd;

		/* Mark the first roothub as being USB 2.0.

		 * The xHCI driver will register the USB 3.0 roothub.

		 */

		hcd->speed = HCD_USB2;

		hcd->self.root_hub->speed = USB_SPEED_HIGH;

		/*

		 * USB 2.0 roothub under xHCI has an integrated TT,

		 * (rate matching hub) as opposed to having an OHCI/UHCI

		 * companion controller.

		 */

		hcd->has_tt = 1;

	} else {

		/* xHCI private pointer was set in xhci_pci_probe for the second

		 * registered roothub.

		 */

		xhci = hcd_to_xhci(hcd);

		temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);

		if (HCC_64BIT_ADDR(temp)) {

			xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");

			dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));

		} else {

			dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));

		}

		return 0;

	}



	xhci->cap_regs = hcd->regs;

	xhci->op_regs = hcd->regs +

		HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));

	xhci->run_regs = hcd->regs +

		(xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);

	/* Cache read-only capability registers */

	xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);

	xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);

	xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);

	xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);

	xhci->hci_version = HC_VERSION(xhci->hcc_params);

	xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);

	xhci_print_registers(xhci);



	get_quirks(dev, xhci);



	/* Make sure the HC is halted. */

	retval = xhci_halt(xhci);

	if (retval)

		goto error;



	xhci_dbg(xhci, "Resetting HCD\n");

	/* Reset the internal HC memory state and registers. */

	retval = xhci_reset(xhci);

	if (retval)

		goto error;

	xhci_dbg(xhci, "Reset complete\n");



	temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);

	if (HCC_64BIT_ADDR(temp)) {

		xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");

		dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));

	} else {

		dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));

	}



	xhci_dbg(xhci, "Calling HCD init\n");

	/* Initialize HCD and host controller data structures. */

	retval = xhci_init(hcd);

	if (retval)

		goto error;

	xhci_dbg(xhci, "Called HCD init\n");

	return 0;

error:

	kfree(xhci);

	return retval;

}



static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)

{

	struct pci_dev		*pdev = to_pci_dev(dev);

drivers/usb/host/xhci.c

+89 −0
Original line number Diff line number Diff line
@@ -3944,6 +3944,95 @@ int xhci_get_frame(struct usb_hcd *hcd) 
	return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;

}



int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)

{

	struct xhci_hcd		*xhci;

	struct device		*dev = hcd->self.controller;

	int			retval;

	u32			temp;



	hcd->self.sg_tablesize = TRBS_PER_SEGMENT - 2;



	if (usb_hcd_is_primary_hcd(hcd)) {

		xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);

		if (!xhci)

			return -ENOMEM;

		*((struct xhci_hcd **) hcd->hcd_priv) = xhci;

		xhci->main_hcd = hcd;

		/* Mark the first roothub as being USB 2.0.

		 * The xHCI driver will register the USB 3.0 roothub.

		 */

		hcd->speed = HCD_USB2;

		hcd->self.root_hub->speed = USB_SPEED_HIGH;

		/*

		 * USB 2.0 roothub under xHCI has an integrated TT,

		 * (rate matching hub) as opposed to having an OHCI/UHCI

		 * companion controller.

		 */

		hcd->has_tt = 1;

	} else {

		/* xHCI private pointer was set in xhci_pci_probe for the second

		 * registered roothub.

		 */

		xhci = hcd_to_xhci(hcd);

		temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);

		if (HCC_64BIT_ADDR(temp)) {

			xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");

			dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));

		} else {

			dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));

		}

		return 0;

	}



	xhci->cap_regs = hcd->regs;

	xhci->op_regs = hcd->regs +

		HC_LENGTH(xhci_readl(xhci, &xhci->cap_regs->hc_capbase));

	xhci->run_regs = hcd->regs +

		(xhci_readl(xhci, &xhci->cap_regs->run_regs_off) & RTSOFF_MASK);

	/* Cache read-only capability registers */

	xhci->hcs_params1 = xhci_readl(xhci, &xhci->cap_regs->hcs_params1);

	xhci->hcs_params2 = xhci_readl(xhci, &xhci->cap_regs->hcs_params2);

	xhci->hcs_params3 = xhci_readl(xhci, &xhci->cap_regs->hcs_params3);

	xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hc_capbase);

	xhci->hci_version = HC_VERSION(xhci->hcc_params);

	xhci->hcc_params = xhci_readl(xhci, &xhci->cap_regs->hcc_params);

	xhci_print_registers(xhci);



	get_quirks(dev, xhci);



	/* Make sure the HC is halted. */

	retval = xhci_halt(xhci);

	if (retval)

		goto error;



	xhci_dbg(xhci, "Resetting HCD\n");

	/* Reset the internal HC memory state and registers. */

	retval = xhci_reset(xhci);

	if (retval)

		goto error;

	xhci_dbg(xhci, "Reset complete\n");



	temp = xhci_readl(xhci, &xhci->cap_regs->hcc_params);

	if (HCC_64BIT_ADDR(temp)) {

		xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");

		dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64));

	} else {

		dma_set_mask(hcd->self.controller, DMA_BIT_MASK(32));

	}



	xhci_dbg(xhci, "Calling HCD init\n");

	/* Initialize HCD and host controller data structures. */

	retval = xhci_init(hcd);

	if (retval)

		goto error;

	xhci_dbg(xhci, "Called HCD init\n");

	return 0;

error:

	kfree(xhci);

	return retval;

}



MODULE_DESCRIPTION(DRIVER_DESC);

MODULE_AUTHOR(DRIVER_AUTHOR);

MODULE_LICENSE("GPL");

drivers/usb/host/xhci.h

+2 −0
Original line number Diff line number Diff line
@@ -1647,6 +1647,7 @@ void xhci_unregister_pci(void); 
#endif



/* xHCI host controller glue */

typedef void (*xhci_get_quirks_t)(struct device *, struct xhci_hcd *);

void xhci_quiesce(struct xhci_hcd *xhci);

int xhci_halt(struct xhci_hcd *xhci);

int xhci_reset(struct xhci_hcd *xhci);
@@ -1654,6 +1655,7 @@ int xhci_init(struct usb_hcd *hcd); 
int xhci_run(struct usb_hcd *hcd);

void xhci_stop(struct usb_hcd *hcd);

void xhci_shutdown(struct usb_hcd *hcd);

int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks);



#ifdef	CONFIG_PM

int xhci_suspend(struct xhci_hcd *xhci);