Loading drivers/clk/qcom/clk-cpu-osm.c +44 −8 Original line number Diff line number Diff line Loading @@ -77,6 +77,7 @@ struct clk_osm { u32 core_num; u64 total_cycle_counter; u32 prev_cycle_counter; unsigned long rate; }; static inline struct clk_osm *to_clk_osm(struct clk_hw *_hw) Loading Loading @@ -168,6 +169,41 @@ const struct clk_ops clk_ops_cpu_osm = { .list_rate = clk_osm_list_rate, }; static int clk_core_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct clk_osm *c = to_clk_osm(hw); if (!c) return -EINVAL; c->rate = rate; return 0; } static unsigned long clk_core_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { struct clk_osm *c = to_clk_osm(hw); if (!c) return -EINVAL; return c->rate; } static long clk_core_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { return rate; } static const struct clk_ops clk_ops_core = { .set_rate = clk_core_set_rate, .round_rate = clk_core_round_rate, .recalc_rate = clk_core_recalc_rate, }; static int l3_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { Loading Loading @@ -277,7 +313,7 @@ static struct clk_osm cpu0_pwrcl_clk = { .name = "cpu0_pwrcl_clk", .parent_names = (const char *[]){ "pwrcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -289,7 +325,7 @@ static struct clk_osm cpu1_pwrcl_clk = { .name = "cpu1_pwrcl_clk", .parent_names = (const char *[]){ "pwrcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -301,7 +337,7 @@ static struct clk_osm cpu2_pwrcl_clk = { .name = "cpu2_pwrcl_clk", .parent_names = (const char *[]){ "pwrcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -313,7 +349,7 @@ static struct clk_osm cpu3_pwrcl_clk = { .name = "cpu3_pwrcl_clk", .parent_names = (const char *[]){ "pwrcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -330,7 +366,7 @@ static struct clk_osm cpu4_perfcl_clk = { .name = "cpu4_perfcl_clk", .parent_names = (const char *[]){ "perfcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -342,7 +378,7 @@ static struct clk_osm cpu5_perfcl_clk = { .name = "cpu5_perfcl_clk", .parent_names = (const char *[]){ "perfcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -354,7 +390,7 @@ static struct clk_osm cpu6_perfcl_clk = { .name = "cpu6_perfcl_clk", .parent_names = (const char *[]){ "perfcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -371,7 +407,7 @@ static struct clk_osm cpu7_perfpcl_clk = { .name = "cpu7_perfpcl_clk", .parent_names = (const char *[]){ "perfpcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading Loading
drivers/clk/qcom/clk-cpu-osm.c +44 −8 Original line number Diff line number Diff line Loading @@ -77,6 +77,7 @@ struct clk_osm { u32 core_num; u64 total_cycle_counter; u32 prev_cycle_counter; unsigned long rate; }; static inline struct clk_osm *to_clk_osm(struct clk_hw *_hw) Loading Loading @@ -168,6 +169,41 @@ const struct clk_ops clk_ops_cpu_osm = { .list_rate = clk_osm_list_rate, }; static int clk_core_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { struct clk_osm *c = to_clk_osm(hw); if (!c) return -EINVAL; c->rate = rate; return 0; } static unsigned long clk_core_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { struct clk_osm *c = to_clk_osm(hw); if (!c) return -EINVAL; return c->rate; } static long clk_core_round_rate(struct clk_hw *hw, unsigned long rate, unsigned long *parent_rate) { return rate; } static const struct clk_ops clk_ops_core = { .set_rate = clk_core_set_rate, .round_rate = clk_core_round_rate, .recalc_rate = clk_core_recalc_rate, }; static int l3_clk_set_rate(struct clk_hw *hw, unsigned long rate, unsigned long parent_rate) { Loading Loading @@ -277,7 +313,7 @@ static struct clk_osm cpu0_pwrcl_clk = { .name = "cpu0_pwrcl_clk", .parent_names = (const char *[]){ "pwrcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -289,7 +325,7 @@ static struct clk_osm cpu1_pwrcl_clk = { .name = "cpu1_pwrcl_clk", .parent_names = (const char *[]){ "pwrcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -301,7 +337,7 @@ static struct clk_osm cpu2_pwrcl_clk = { .name = "cpu2_pwrcl_clk", .parent_names = (const char *[]){ "pwrcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -313,7 +349,7 @@ static struct clk_osm cpu3_pwrcl_clk = { .name = "cpu3_pwrcl_clk", .parent_names = (const char *[]){ "pwrcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -330,7 +366,7 @@ static struct clk_osm cpu4_perfcl_clk = { .name = "cpu4_perfcl_clk", .parent_names = (const char *[]){ "perfcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -342,7 +378,7 @@ static struct clk_osm cpu5_perfcl_clk = { .name = "cpu5_perfcl_clk", .parent_names = (const char *[]){ "perfcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -354,7 +390,7 @@ static struct clk_osm cpu6_perfcl_clk = { .name = "cpu6_perfcl_clk", .parent_names = (const char *[]){ "perfcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading @@ -371,7 +407,7 @@ static struct clk_osm cpu7_perfpcl_clk = { .name = "cpu7_perfpcl_clk", .parent_names = (const char *[]){ "perfpcl_clk" }, .num_parents = 1, .ops = &clk_dummy_ops, .ops = &clk_ops_core, }, }; Loading