Merge "ARM: dts: msm: Add CommandDB device bindings for sdmmagpie"

QTI PDC interrupt controller

PDC is QTI's platform parent interrupt controller that serves as wakeup source.

Newer QTI SOCs are replacing MPM (MSM sleep Power Manager) with PDC (Power

Domain Controller) to manage subsystem wakeups and resources during sleep.

This driver marks the wakeup interrupts in APSS PDC such that it monitors the

interrupts when the system is asleep, wakes up the APSS when one of these

interrupts occur and replays it to the subsystem interrupt controller after it

becomes operational.

Earlier MPM architecture used arch-extension of GIC interrupt

controller to mark enabled wake-up interrupts and monitor these when the

system goes to sleep. Since the arch-extensions are no-longer available

on newer kernel versions, this driver is implemented as hierarchical irq

domain.  GIC is parent interrupt controller at the highest level.

Platform interrupt controller PDC is next in hierarchy, followed by others.

This driver only configures the interrupts, does not handle them.

PDC interrupt configuration involves programming of 2 set of registers:

IRQ_ENABLE_BANK    - Enable the irq

IRQ_i_CFG          - Configure the interrupt i

Properties:

- compatible:

	Usage: required

	Value type: <string>

	Definition: Should contain "qcom,pdc-<target>"

- reg:

	Usage: required

	Value type: <prop-encoded-array>

	Definition: Specifies the base physical address for PDC hardware

			block for DRV2.

- interrupt-cells:

	Usage: required

	Value type: <u32>

	Definition: Specifies the number of cells needed to encode an interrupt source.

			Value must be 3.

			The encoding of these cells are same as described in

			Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.txt

- interrupt-parent:

	Usage: required

	Value type: <phandle>

	Definition: Specifies the interrupt parent necessary for hierarchical domain to operate.

- interrupt-controller:

	Usage: required

	Value type: <bool>

	Definition: Identifies the node as an interrupt controller.

Example:

pdcgic: interrupt-controller@0xb220000{

	compatible = "qcom,pdc-sdmmagpie";

	reg = <0xb220000 0x30000>;

	#interrupt-cells = <3>;

	interrupt-parent = <&intc>;

	interrupt-controller;

};

/* Copyright (c) 2018, The Linux Foundation. All rights reserved.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 and

 * only version 2 as published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */

&soc {

	qcom,lpm-levels {

		compatible = "qcom,lpm-levels";

		#address-cells = <1>;

		#size-cells = <0>;

		qcom,pm-cluster@0 {

			reg = <0>;

			#address-cells = <1>;

			#size-cells = <0>;

			label = "L3";

			qcom,psci-mode-shift = <4>;

			qcom,psci-mode-mask = <0xfff>;

			qcom,pm-cluster-level@0 { /* D1 */

				reg = <0>;

				label = "l3-wfi";

				qcom,psci-mode = <0x1>;

				qcom,latency-us = <600>;

				qcom,ss-power = <420>;

				qcom,energy-overhead = <4254140>;

				qcom,time-overhead = <1260>;

			};

			qcom,pm-cluster-level@1 { /* D4 */

				reg = <1>;

				label = "l3-pc";

				qcom,psci-mode = <0x4>;

				qcom,latency-us = <3048>;

				qcom,ss-power = <329>;

				qcom,energy-overhead = <6189829>;

				qcom,time-overhead = <5800>;

				qcom,min-child-idx = <2>;

				qcom,is-reset;

			};

			qcom,pm-cluster-level@2 { /* Cx Off */

				reg = <2>;

				label = "cx-off";

				qcom,psci-mode = <0x224>;

				qcom,latency-us = <4562>;

				qcom,ss-power = <290>;

				qcom,energy-overhead = <6989829>;

				qcom,time-overhead = <8200>;

				qcom,min-child-idx = <2>;

				qcom,is-reset;

				qcom,notify-rpm;

			};

			qcom,pm-cluster-level@3 { /* LLCC off, AOSS sleep */

				reg = <3>;

				label = "llcc-off";

				qcom,psci-mode = <0xC24>;

				qcom,latency-us = <6562>;

				qcom,ss-power = <165>;

				qcom,energy-overhead = <7000029>;

				qcom,time-overhead = <9825>;

				qcom,min-child-idx = <2>;

				qcom,is-reset;

				qcom,notify-rpm;

			};

			qcom,pm-cpu@0 {

				#address-cells = <1>;

				#size-cells = <0>;

				qcom,psci-mode-shift = <0>;

				qcom,psci-mode-mask = <0xf>;

				qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3 &CPU4

									&CPU5>;

				qcom,pm-cpu-level@0 { /* C1 */

					reg = <0>;

					label = "wfi";

					qcom,psci-cpu-mode = <0x1>;

					qcom,latency-us = <60>;

					qcom,ss-power = <383>;

					qcom,energy-overhead = <64140>;

					qcom,time-overhead = <121>;

				};

				qcom,pm-cpu-level@1 {  /* C3 */

					reg = <1>;

					label = "pc";

					qcom,psci-cpu-mode = <0x3>;

					qcom,latency-us = <901>;

					qcom,ss-power = <364>;

					qcom,energy-overhead = <579285>;

					qcom,time-overhead = <1450>;

					qcom,is-reset;

					qcom,use-broadcast-timer;

				};

				qcom,pm-cpu-level@2 {  /* C4 */

					reg = <2>;

					label = "rail-pc";

					qcom,psci-cpu-mode = <0x4>;

					qcom,latency-us = <915>;

					qcom,ss-power = <353>;

					qcom,energy-overhead = <666292>;

					qcom,time-overhead = <1617>;

					qcom,is-reset;

					qcom,use-broadcast-timer;

				};

			};

			qcom,pm-cpu@1 {

				#address-cells = <1>;

				#size-cells = <0>;

				qcom,psci-mode-shift = <0>;

				qcom,psci-mode-mask = <0xf>;

				qcom,cpu = <&CPU6 &CPU7>;

				qcom,pm-cpu-level@0 { /* C1 */

					reg = <0>;

					label = "wfi";

					qcom,psci-cpu-mode = <0x1>;

					qcom,latency-us = <66>;

					qcom,ss-power = <427>;

					qcom,energy-overhead = <68410>;

					qcom,time-overhead = <121>;

				};

				qcom,pm-cpu-level@1 {  /* C3 */

					reg = <1>;

					label = "pc";

					qcom,psci-cpu-mode = <0x3>;

					qcom,latency-us = <1244>;

					qcom,ss-power = <373>;

					qcom,energy-overhead = <795006>;

					qcom,time-overhead = <1767>;

					qcom,is-reset;

					qcom,use-broadcast-timer;

				};

				qcom,pm-cpu-level@2 {  /* C4 */

					reg = <2>;

					label = "rail-pc";

					qcom,psci-cpu-mode = <0x4>;

					qcom,latency-us = <1854>;

					qcom,ss-power = <359>;

					qcom,energy-overhead = <1068095>;

					qcom,time-overhead = <2380>;

					qcom,is-reset;

					qcom,use-broadcast-timer;

				};

			};

		};

	};

	qcom,rpm-stats@c300000 {

		compatible = "qcom,rpm-stats";

		reg = <0xc300000 0x1000>, <0xc3f0004 0x4>;

		reg-names = "phys_addr_base", "offset_addr";

	};

	qcom,rpmh-master-stats@b221200 {

		compatible = "qcom,rpmh-master-stats-v1";

		reg = <0xb221200 0x60>;

	};

};

#include <dt-bindings/clock/qcom,dispcc-sdmmagpie.h>

#include <dt-bindings/clock/qcom,npucc-sdmmagpie.h>

#include <dt-bindings/clock/qcom,rpmh.h>

#include <dt-bindings/soc/qcom,tcs-mbox.h>

/ {

	model = "Qualcomm Technologies, Inc. SDMMAGPIE";

	compatible = "qcom,sdmmagpie";

	qcom,msm-id = <365 0x0>;

	interrupt-parent = <&intc>;

	interrupt-parent = <&pdc>;

	cpus {

		#address-cells = <2>;

		interrupt-parent = <&intc>;

	};

	pdc: interrupt-controller@b220000 {

		compatible = "qcom,pdc-sdmmagpie";

		reg = <0xb220000 0x400>;

		#interrupt-cells = <3>;

		interrupt-parent = <&intc>;

		interrupt-controller;

	};

	timer {

		compatible = "arm,armv8-timer";

		interrupts = <GIC_PPI 1 0xf08>,

			compatible = "qcom,llcc-amon";

		};

	};

	apps_rsc: mailbox@18220000 {

		compatible = "qcom,tcs-drv";

		label = "apps_rsc";

		reg = <0x18220000 0x100>, <0x18220d00 0x3000>;

		interrupts = <0 5 0>;

		#mbox-cells = <1>;

		qcom,drv-id = <2>;

		qcom,tcs-config = <ACTIVE_TCS  2>,

				  <SLEEP_TCS   3>,

				  <WAKE_TCS    3>,

				  <CONTROL_TCS 1>;

	};

	disp_rsc: mailbox@af20000 {

		compatible = "qcom,tcs-drv";

		label = "display_rsc";

		reg = <0xaf20000 0x100>, <0xaf21c00 0x3000>;

		interrupts = <0 129 0>;

		#mbox-cells = <1>;

		qcom,drv-id = <0>;

		qcom,tcs-config = <ACTIVE_TCS  2>,

				  <SLEEP_TCS   1>,

				  <WAKE_TCS    1>,

				  <CONTROL_TCS 0>;

	};

	system_pm {

		compatible = "qcom,system-pm";

		mboxes = <&apps_rsc 0>;

	};

	cmd_db: qcom,cmd-db@c3f000c {

		compatible = "qcom,cmd-db";

		reg = <0xc3f000c 8>;

	};

};

#include "sdmmagpie-pinctrl.dtsi"

#include "sdmmagpie-ion.dtsi"

#include "msm-arm-smmu-sdmmagpie.dtsi"

#include "sdmmagpie-pm.dtsi"

        help

          QTI Power Domain Controller for SM6150

config QTI_PDC_SDMMAGPIE

        bool "QTI PDC SDMMAGPIE"

        select QTI_PDC

        default y if ARCH_SDMMAGPIE

        help

          QTI Power Domain Controller for SDMMAGPIE

	  This is used for managing and configuring

	  the wakeup interrupts. Enable it when

	  ARCH_SDMMAGPIE is selected.

config QTI_MPM

	bool "QTI MPM"

	depends on ARCH_QCOM

obj-$(CONFIG_QTI_PDC)			+= pdc.o

obj-$(CONFIG_QTI_PDC_SM8150)		+= pdc-sm8150.o

obj-$(CONFIG_QTI_PDC_SM6150)		+= pdc-sm6150.o

obj-$(CONFIG_QTI_PDC_SDMMAGPIE)		+= pdc-sdmmagpie.o

obj-$(CONFIG_QTI_MPM)			+= mpm.o

obj-$(CONFIG_QTI_MPM)			+= mpm.o mpm-8937.o