Loading arch/arm64/boot/dts/qcom/qcs405-usb.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -30,9 +30,10 @@ <&clock_gcc GCC_SYS_NOC_USB3_CLK>, <&clock_gcc GCC_USB30_SLEEP_CLK>, <&clock_gcc GCC_USB30_MOCK_UTMI_CLK>, <&clock_rpmcc CXO_SMD_OTG_CLK>; <&clock_rpmcc CXO_SMD_OTG_CLK>, <&clock_gcc GCC_PCNOC_USB3_CLK>; clock-names = "core_clk", "iface_clk", "sleep_clk", "utmi_clk", "xo"; "utmi_clk", "xo", "noc_aggr_clk"; qcom,core-clk-rate = <200000000>; qcom,core-clk-rate-hs = <10000000>; Loading Loading
arch/arm64/boot/dts/qcom/qcs405-usb.dtsi +3 −2 Original line number Diff line number Diff line Loading @@ -30,9 +30,10 @@ <&clock_gcc GCC_SYS_NOC_USB3_CLK>, <&clock_gcc GCC_USB30_SLEEP_CLK>, <&clock_gcc GCC_USB30_MOCK_UTMI_CLK>, <&clock_rpmcc CXO_SMD_OTG_CLK>; <&clock_rpmcc CXO_SMD_OTG_CLK>, <&clock_gcc GCC_PCNOC_USB3_CLK>; clock-names = "core_clk", "iface_clk", "sleep_clk", "utmi_clk", "xo"; "utmi_clk", "xo", "noc_aggr_clk"; qcom,core-clk-rate = <200000000>; qcom,core-clk-rate-hs = <10000000>; Loading