Merge "clk: qcom: gcc: Set cpuss clock to 19.2Mhz frequency" (53b470fc) · Commits · e / devices / android_kernel_oneplus_sm8150

drivers/clk/qcom/gcc-sdxprairie.c

+6 −4

Original line number	Diff line number	Diff line
		@@ -550,6 +550,9 @@ static struct clk_rcg2 gcc_blsp1_uart4_apps_clk_src = {

		static const struct freq_tbl ftbl_gcc_cpuss_ahb_clk_src[] = {
		F(19200000, P_BI_TCXO, 1, 0, 0),
		F(50000000, P_GPLL0_OUT_EVEN, 6, 0, 0),
		F(100000000, P_GPLL0_OUT_MAIN, 6, 0, 0),
		F(133333333, P_GPLL0_OUT_MAIN, 4.5, 0, 0),
		{ }
		};

		@@ -564,10 +567,6 @@ static struct clk_rcg2 gcc_cpuss_ahb_clk_src = {
		.parent_names = gcc_parent_names_0_ao,
		.num_parents = 4,
		.ops = &clk_rcg2_ops,
		.vdd_class = &vdd_cx_ao,
		.num_rate_max = VDD_NUM,
		.rate_max = (unsigned long[VDD_NUM]) {
		[VDD_MIN] = 19200000},
		},
		};

		@@ -1927,6 +1926,9 @@ static int gcc_sdxprairie_probe(struct platform_device *pdev)
		return ret;
		}

		clk_set_rate(gcc_cpuss_ahb_clk.clkr.hw.clk, 19200000);
		clk_set_rate(gcc_sys_noc_cpuss_ahb_clk.clkr.hw.clk, 19200000);

		dev_info(&pdev->dev, "Registered GCC clocks\n");

		return ret;